2018-02-25 18:14:58 -07:00
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using ChocolArm64.Events;
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2018-02-04 16:08:20 -07:00
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using System;
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namespace ChocolArm64.State
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{
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public class AThreadState
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{
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internal const int LRIndex = 30;
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internal const int ZRIndex = 31;
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2018-02-06 08:15:08 -07:00
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internal const int ErgSizeLog2 = 4;
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internal const int DczSizeLog2 = 4;
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public ulong X0, X1, X2, X3, X4, X5, X6, X7,
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X8, X9, X10, X11, X12, X13, X14, X15,
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X16, X17, X18, X19, X20, X21, X22, X23,
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X24, X25, X26, X27, X28, X29, X30, X31;
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public AVec V0, V1, V2, V3, V4, V5, V6, V7,
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V8, V9, V10, V11, V12, V13, V14, V15,
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V16, V17, V18, V19, V20, V21, V22, V23,
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V24, V25, V26, V27, V28, V29, V30, V31;
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public bool Overflow;
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public bool Carry;
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public bool Zero;
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public bool Negative;
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public int ProcessId;
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public int ThreadId;
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public long TpidrEl0 { get; set; }
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public long Tpidr { get; set; }
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public int Fpcr { get; set; }
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public int Fpsr { get; set; }
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public uint CtrEl0 => 0x8444c004;
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public uint DczidEl0 => 0x00000004;
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2018-03-10 16:51:55 -07:00
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private const ulong TicksPerS = 19_200_000;
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private const ulong TicksPerMS = TicksPerS / 1_000;
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2018-03-10 16:51:55 -07:00
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public ulong CntpctEl0 => (ulong)Environment.TickCount * TicksPerMS;
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public event EventHandler<AInstExceptionEventArgs> Break;
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public event EventHandler<AInstExceptionEventArgs> SvcCall;
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public event EventHandler<AInstUndefinedEventArgs> Undefined;
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internal void OnBreak(int Imm)
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{
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Break?.Invoke(this, new AInstExceptionEventArgs(Imm));
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}
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internal void OnSvcCall(int Imm)
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{
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SvcCall?.Invoke(this, new AInstExceptionEventArgs(Imm));
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}
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internal void OnUndefined(long Position, int RawOpCode)
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{
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Undefined?.Invoke(this, new AInstUndefinedEventArgs(Position, RawOpCode));
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}
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}
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}
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