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Fix PTC count table relocation patching (#2666)

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Fix an issue introduced in #2190 where by 2 different count table entry
addresses were used for LCQ functions. E.g:

```asm
 .L1:
   mov rbp,COUNT_TABLE_0   ;; This gets an address.
   mov ebp,[rbp]
   lea esi,[rbp+1]
   mov rdi,COUNT_TABLE_1   ;; This gets another address.
   mov [rdi],esi
   cmp ebp,64h
   je near .L34
```

This caused LCQ functions to not tier up when they're loaded from the
PTC cache. This does not happen when they're freshly compiled.

This PR fixes the issue by ensuring only a single counter is created per
translation.
This commit is contained in:
FICTURE7 2021-09-29 02:28:34 +04:00 committed by GitHub
parent 79c854dd2e
commit 0d23504e30
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1 changed files with 4 additions and 1 deletions
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3
ARMeilleure/Translation/PTC/Ptc.cs
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@ -680,8 +680,11 @@ namespace ARMeilleure.Translation.PTC
imm = translator.Memory.PageTablePointer; imm = translator.Memory.PageTablePointer;
} }
else if (symbol == CountTableSymbol) else if (symbol == CountTableSymbol)
{
if (callCounter == null)
{ {
callCounter = new Counter<uint>(translator.CountTable); callCounter = new Counter<uint>(translator.CountTable);
}
unsafe { imm = (IntPtr)Unsafe.AsPointer(ref callCounter.Value); } unsafe { imm = (IntPtr)Unsafe.AsPointer(ref callCounter.Value); }
} }