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https://github.com/Ryujinx-NX/Ryujinx.git
synced 2024-11-14 21:17:43 -07:00
Add R2P shader instruction
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@ -143,6 +143,9 @@ namespace Ryujinx.Graphics.Shader.Decoders
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Set("0011100x00001x", InstEmit.Popc, typeof(OpCodeAluImm));
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Set("0101110000001x", InstEmit.Popc, typeof(OpCodeAluReg));
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Set("0101000010010x", InstEmit.Psetp, typeof(OpCodePsetp));
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Set("0100110011110x", InstEmit.R2p, typeof(OpCodeAluCbuf));
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Set("0011100x11110x", InstEmit.R2p, typeof(OpCodeAluImm));
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Set("0101110011110x", InstEmit.R2p, typeof(OpCodeAluReg));
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Set("1110101111111x", InstEmit.Red, typeof(OpCodeRed));
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Set("0100110010010x", InstEmit.Rro, typeof(OpCodeFArithCbuf));
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Set("0011100x10010x", InstEmit.Rro, typeof(OpCodeFArithImm));
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@ -213,7 +213,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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Operand mem,
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Operand value)
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{
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Operand res = null;
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Operand res = Const(0);
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switch (op)
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{
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@ -16,6 +16,38 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.Copy(GetDest(context), GetSrcB(context));
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}
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public static void R2p(EmitterContext context)
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{
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OpCodeAlu op = (OpCodeAlu)context.CurrOp;
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bool isCC = op.RawOpCode.Extract(40);
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int shift = op.RawOpCode.Extract(41, 2) * 8;
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Operand value = GetSrcA(context);
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Operand mask = GetSrcB(context);
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Operand Test(Operand value, int bit)
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{
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return context.ICompareNotEqual(context.BitwiseAnd(value, Const(1 << bit)), Const(0));
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}
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if (isCC)
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{
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// TODO.
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}
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else
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{
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for (int bit = 0; bit < 7; bit++)
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{
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Operand pred = Register(bit, RegisterType.Predicate);
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Operand res = context.ConditionalSelect(Test(mask, bit), Test(value, bit + shift), pred);
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context.Copy(pred, res);
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}
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}
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}
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public static void S2r(EmitterContext context)
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{
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// TODO: Better impl.
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