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https://github.com/Ryujinx-NX/Ryujinx.git
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36ec1bc6c0
* Relax block ordering constraints Before `block.Next` had to follow `block.ListNext`, now it does not. Instead `CodeGenerator` will now emit the necessary jump instructions to ensure control flow. This makes control flow and block order modifications easier. It also eliminates some simple cases of redundant branches. * Set PPTC version
322 lines
11 KiB
C#
322 lines
11 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.Diagnostics;
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using ARMeilleure.Instructions;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Memory;
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using ARMeilleure.State;
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using System;
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using System.Collections.Concurrent;
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using System.Threading;
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using static ARMeilleure.IntermediateRepresentation.OperandHelper;
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using static ARMeilleure.IntermediateRepresentation.OperationHelper;
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namespace ARMeilleure.Translation
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{
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using PTC;
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public class Translator
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{
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private const ulong CallFlag = InstEmitFlowHelper.CallFlag;
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private readonly IMemoryManager _memory;
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private readonly ConcurrentDictionary<ulong, TranslatedFunction> _funcs;
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private readonly ConcurrentStack<RejitRequest> _backgroundStack;
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private readonly AutoResetEvent _backgroundTranslatorEvent;
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private readonly JumpTable _jumpTable;
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private volatile int _threadCount;
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public Translator(IJitMemoryAllocator allocator, IMemoryManager memory)
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{
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_memory = memory;
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_funcs = new ConcurrentDictionary<ulong, TranslatedFunction>();
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_backgroundStack = new ConcurrentStack<RejitRequest>();
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_backgroundTranslatorEvent = new AutoResetEvent(false);
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_jumpTable = new JumpTable(allocator);
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JitCache.Initialize(allocator);
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DirectCallStubs.InitializeStubs();
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if (Ptc.State == PtcState.Enabled)
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{
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Ptc.LoadTranslations(_funcs, memory.PageTablePointer, _jumpTable);
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}
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}
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private void TranslateStackedSubs()
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{
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while (_threadCount != 0)
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{
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if (_backgroundStack.TryPop(out RejitRequest request))
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{
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TranslatedFunction func = Translate(_memory, _jumpTable, request.Address, request.Mode, highCq: true);
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_funcs.AddOrUpdate(request.Address, func, (key, oldFunc) => func);
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_jumpTable.RegisterFunction(request.Address, func);
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if (PtcProfiler.Enabled)
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{
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PtcProfiler.UpdateEntry(request.Address, request.Mode, highCq: true);
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}
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}
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else
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{
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_backgroundTranslatorEvent.WaitOne();
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}
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}
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_backgroundTranslatorEvent.Set(); // Wake up any other background translator threads, to encourage them to exit.
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}
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public void Execute(State.ExecutionContext context, ulong address)
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{
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if (Interlocked.Increment(ref _threadCount) == 1)
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{
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if (Ptc.State == PtcState.Enabled)
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{
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Ptc.MakeAndSaveTranslations(_funcs, _memory, _jumpTable);
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}
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PtcProfiler.Start();
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Ptc.Disable();
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// Simple heuristic, should be user configurable in future. (1 for 4 core/ht or less, 2 for 6 core+ht etc).
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// All threads are normal priority except from the last, which just fills as much of the last core as the os lets it with a low priority.
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// If we only have one rejit thread, it should be normal priority as highCq code is performance critical.
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// TODO: Use physical cores rather than logical. This only really makes sense for processors with hyperthreading. Requires OS specific code.
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int unboundedThreadCount = Math.Max(1, (Environment.ProcessorCount - 6) / 3);
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int threadCount = Math.Min(4, unboundedThreadCount);
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for (int i = 0; i < threadCount; i++)
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{
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bool last = i != 0 && i == unboundedThreadCount - 1;
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Thread backgroundTranslatorThread = new Thread(TranslateStackedSubs)
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{
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Name = "CPU.BackgroundTranslatorThread." + i,
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Priority = last ? ThreadPriority.Lowest : ThreadPriority.Normal
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};
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backgroundTranslatorThread.Start();
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}
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}
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Statistics.InitializeTimer();
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NativeInterface.RegisterThread(context, _memory, this);
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do
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{
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address = ExecuteSingle(context, address);
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}
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while (context.Running && (address & ~1UL) != 0);
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NativeInterface.UnregisterThread();
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if (Interlocked.Decrement(ref _threadCount) == 0)
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{
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_backgroundTranslatorEvent.Set();
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}
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}
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public ulong ExecuteSingle(State.ExecutionContext context, ulong address)
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{
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TranslatedFunction func = GetOrTranslate(address, context.ExecutionMode);
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Statistics.StartTimer();
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ulong nextAddr = func.Execute(context);
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Statistics.StopTimer(address);
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return nextAddr;
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}
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internal TranslatedFunction GetOrTranslate(ulong address, ExecutionMode mode)
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{
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// TODO: Investigate how we should handle code at unaligned addresses.
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// Currently, those low bits are used to store special flags.
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bool isCallTarget = (address & CallFlag) != 0;
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address &= ~CallFlag;
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if (!_funcs.TryGetValue(address, out TranslatedFunction func))
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{
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func = Translate(_memory, _jumpTable, address, mode, highCq: false);
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_funcs.TryAdd(address, func);
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if (PtcProfiler.Enabled)
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{
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PtcProfiler.AddEntry(address, mode, highCq: false);
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}
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}
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if (isCallTarget && func.ShouldRejit())
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{
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_backgroundStack.Push(new RejitRequest(address, mode));
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_backgroundTranslatorEvent.Set();
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}
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return func;
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}
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internal static TranslatedFunction Translate(IMemoryManager memory, JumpTable jumpTable, ulong address, ExecutionMode mode, bool highCq)
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{
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ArmEmitterContext context = new ArmEmitterContext(memory, jumpTable, (long)address, highCq, Aarch32Mode.User);
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PrepareOperandPool(highCq);
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PrepareOperationPool(highCq);
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Logger.StartPass(PassName.Decoding);
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Block[] blocks = Decoder.Decode(memory, address, mode, highCq, singleBlock: false);
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Logger.EndPass(PassName.Decoding);
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Logger.StartPass(PassName.Translation);
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EmitSynchronization(context);
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if (blocks[0].Address != address)
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{
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context.Branch(context.GetLabel(address));
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}
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ControlFlowGraph cfg = EmitAndGetCFG(context, blocks);
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Logger.EndPass(PassName.Translation);
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Logger.StartPass(PassName.RegisterUsage);
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RegisterUsage.RunPass(cfg, mode, isCompleteFunction: false);
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Logger.EndPass(PassName.RegisterUsage);
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OperandType[] argTypes = new OperandType[] { OperandType.I64 };
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CompilerOptions options = highCq ? CompilerOptions.HighCq : CompilerOptions.None;
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GuestFunction func;
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if (Ptc.State == PtcState.Disabled)
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{
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func = Compiler.Compile<GuestFunction>(cfg, argTypes, OperandType.I64, options);
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}
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else
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{
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using (PtcInfo ptcInfo = new PtcInfo())
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{
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func = Compiler.Compile<GuestFunction>(cfg, argTypes, OperandType.I64, options, ptcInfo);
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Ptc.WriteInfoCodeReloc((long)address, highCq, ptcInfo);
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}
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}
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ResetOperandPool(highCq);
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ResetOperationPool(highCq);
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return new TranslatedFunction(func, highCq);
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}
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private static ControlFlowGraph EmitAndGetCFG(ArmEmitterContext context, Block[] blocks)
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{
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for (int blkIndex = 0; blkIndex < blocks.Length; blkIndex++)
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{
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Block block = blocks[blkIndex];
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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if (block.Exit)
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{
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InstEmitFlowHelper.EmitTailContinue(context, Const(block.Address), block.TailCall);
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}
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else
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{
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for (int opcIndex = 0; opcIndex < block.OpCodes.Count; opcIndex++)
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{
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OpCode opCode = block.OpCodes[opcIndex];
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context.CurrOp = opCode;
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bool isLastOp = opcIndex == block.OpCodes.Count - 1;
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if (isLastOp && block.Branch != null && !block.Branch.Exit && block.Branch.Address <= block.Address)
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{
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EmitSynchronization(context);
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}
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Operand lblPredicateSkip = null;
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if (opCode is OpCode32 op && op.Cond < Condition.Al)
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{
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lblPredicateSkip = Label();
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InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Invert());
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}
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if (opCode.Instruction.Emitter != null)
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{
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opCode.Instruction.Emitter(context);
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}
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else
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{
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throw new InvalidOperationException($"Invalid instruction \"{opCode.Instruction.Name}\".");
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}
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if (lblPredicateSkip != null)
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{
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context.MarkLabel(lblPredicateSkip);
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}
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}
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}
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}
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return context.GetControlFlowGraph();
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}
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private static void EmitSynchronization(EmitterContext context)
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{
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long countOffs = NativeContext.GetCounterOffset();
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Operand countAddr = context.Add(context.LoadArgument(OperandType.I64, 0), Const(countOffs));
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Operand count = context.Load(OperandType.I32, countAddr);
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Operand lblNonZero = Label();
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Operand lblExit = Label();
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context.BranchIfTrue(lblNonZero, count);
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Operand running = context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.CheckSynchronization)));
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context.BranchIfTrue(lblExit, running);
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context.Return(Const(0L));
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context.MarkLabel(lblNonZero);
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count = context.Subtract(count, Const(1));
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context.Store(countAddr, count);
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context.MarkLabel(lblExit);
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}
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}
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}
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