2009-07-20 05:27:49 -06:00
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; This is the ucode used to "unlock" memcards
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; RE purely out of interest, and hunch that it does trickies
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IROM_BASE: equ 0x8000
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; Exception vectors
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2009-07-23 20:15:04 -06:00
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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halt ; Exception 0-6 nop slide to here
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rti ; Exception 7
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halt
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2009-07-20 05:27:49 -06:00
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; Entry point
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; Standard init stuff
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sbset #0x06
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sbclr #0x03
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sbclr #0x04
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sbset #0x05
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lri $CR, #0x00ff
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lri $WR0, #0xffff
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lri $WR1, #0xffff
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lri $WR2, #0xffff
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lri $WR3, #0xffff
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set40
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; 0xdcd10000 is the init mail
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call wait_for_dsp_mbox
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si @DMBH, #0xdcd1
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si @DMBL, #0x0000
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si @DIRQ, #0x0001
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; Wait for cpu to say "go!" - i think
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wait_for_start_cmd:
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call wait_for_cpu_mbox
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lrs $AC1.L, @CMBL
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cmpi $AC1.M, #0xff00
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jnz wait_for_start_cmd
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dma_dram_and_prepare_for_crazy_irom_func:
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call wait_for_cpu_mbox
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mrr $AC0.M, $AC1.M
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lrs $AC0.L, @CMBL ; main ram addr.l
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andi $AC0.M, #0x0fff ; main ram addr.h & 0x0fff
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lri $AX0.L, #0x0400 ; dsp addr
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lri $AX0.H, #0x0010 ; length (bytes)
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lri $AX1.L, #0x0000 ; dsp dram to cpu
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set16
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call do_dma
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call IROM_BASE+0x0644; holy mother of jesus that func is gonna be hard
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; 0xdcd10003 means finished unlocking?
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call wait_for_dsp_mbox
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si @DMBH, #0xdcd1
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si @DMBL, #0x0003
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si @DIRQ, #0x0001
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set40
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call wait_for_cpu_mbox
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cmpi $AC1.M, #0xcdd1
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jnz dma_dram_and_prepare_for_crazy_irom_func
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lrs $AC1.M, @CMBL
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cmpi $AC1.M, #0x0001
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jz _005afunc
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cmpi $AC1.M, #0x0002
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jz IROM_BASE ; End of this ucode, wait for a new one
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jmp dma_dram_and_prepare_for_crazy_irom_func
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halt ; Prolly never reached
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; 10 mails from cpu then irom func - looks interesting
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_005afunc:
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set16
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call wait_for_cpu_mbox
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lrs $AC1.L, @CMBL
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call wait_for_cpu_mbox
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lrs $AC1.L, @CMBL
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call wait_for_cpu_mbox
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lrs $AC1.L, @CMBL
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call wait_for_cpu_mbox
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lr $IX1, @CMBL
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andi $AC1.M, #0x0fff
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mrr $IX0, $AC1.M
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call wait_for_cpu_mbox
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lr $IX3, @CMBL
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call wait_for_cpu_mbox
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lr $IX2, @CMBL
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call wait_for_cpu_mbox
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lr $AR0, @CMBL
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call wait_for_cpu_mbox
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lrs $AX0.L, @CMBL
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andi $AC1.M, #0x0fff
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mrr $AX0.H, $AC1.M
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call wait_for_cpu_mbox
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lrs $AX1.L, @CMBL
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call wait_for_cpu_mbox
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lrs $AX1.H, @CMBL
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sbclr #0x05
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sbclr #0x06
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jmp IROM_BASE+0x00b5; IROM - can dma stuff
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halt
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wait_for_dsp_mbox:
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lrs $AC1.M, @DMBH
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andcf $AC1.M, #0x8000
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jlz wait_for_dsp_mbox
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ret
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wait_for_cpu_mbox:
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lrs $AC1.M, @CMBH
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andcf $AC1.M, #0x8000
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jlnz wait_for_cpu_mbox
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ret
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do_dma:
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srs @DSMAH, $AC0.M
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srs @DSMAL, $AC0.L
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sr @DSPA, $AX0.L
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sr @DSCR, $AX1.L
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sr @DSBL, $AX0.H
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wait_dma:
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lrs $AC0.M, @DSCR
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andcf $AC0.M, #0x0004
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jlz wait_dma
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ret
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2009-07-23 20:15:04 -06:00
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; Trailing nops...pad to 32bytes
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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2009-07-20 05:27:49 -06:00
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; uCode is 0xb0 words
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