piwalker/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-07-23 14:19:46 -06:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #12471 from mitaclaw/flush-gpr-arm-bug

Browse Source 
Fix Logic Inefficiency in Arm64GPRCache::FlushRegisters
This commit is contained in:
Tilka
2024-01-01 00:46:34 +01:00
committed by GitHub
parent 8ecc478662 01e534a681
commit 07df4ff16e
1 changed files with 3 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp
View File

@ -243,8 +243,9 @@ void Arm64GPRCache::FlushRegister(size_t index, bool maintain_state, ARM64Reg tm
void Arm64GPRCache::FlushRegisters(BitSet32 regs, bool maintain_state, ARM64Reg tmp_reg) void Arm64GPRCache::FlushRegisters(BitSet32 regs, bool maintain_state, ARM64Reg tmp_reg)
{ {
for (int i : regs) for (auto iter = regs.begin(); iter != regs.end(); ++iter)
{ {
const int i = *iter;
ASSERT_MSG(DYNA_REC, m_guest_registers[GUEST_GPR_OFFSET + i].GetType() != RegType::Discarded, ASSERT_MSG(DYNA_REC, m_guest_registers[GUEST_GPR_OFFSET + i].GetType() != RegType::Discarded,
"Attempted to flush discarded register"); "Attempted to flush discarded register");
@ -269,7 +270,7 @@ void Arm64GPRCache::FlushRegisters(BitSet32 regs, bool maintain_state, ARM64Reg
reg1.Flush(); reg1.Flush();
reg2.Flush(); reg2.Flush();
} }
++i; ++iter;
continue; continue;
} }
} }