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JitArm64: divwx - Optimize constant dividend
When the dividend is known at compile time, we can eliminate some of the branching and precompute the result for the overflow case.
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@ -1373,6 +1373,10 @@ void ARM64XEmitter::CMP(ARM64Reg Rn, u32 imm, bool shift)
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{
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EncodeAddSubImmInst(1, true, shift, imm, Rn, Is64Bit(Rn) ? ARM64Reg::SP : ARM64Reg::WSP);
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}
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void ARM64XEmitter::CMN(ARM64Reg Rn, u32 imm, bool shift)
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{
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EncodeAddSubImmInst(0, true, shift, imm, Rn, Is64Bit(Rn) ? ARM64Reg::SP : ARM64Reg::WSP);
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}
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// Data Processing (Immediate)
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void ARM64XEmitter::MOVZ(ARM64Reg Rd, u32 imm, ShiftAmount pos)
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