Multithreadded Shadergen: First pass over pixel Shadergen

Bug Fix: It was theoretically possible for a shader with depth writes
         disabled to map to the same UID as a shader with late depth
	 writes.
	 No known test cases trigger this.
This commit is contained in:
Scott Mansell
2016-01-17 02:25:16 +13:00
parent e99364c7c9
commit 0d996f512b
2 changed files with 227 additions and 181 deletions

View File

@ -46,11 +46,12 @@ struct pixel_shader_uid_data
u32 per_pixel_lighting : 1;
u32 forced_early_z : 1;
u32 early_ztest : 1;
u32 late_ztest : 1;
u32 bounding_box : 1;
u32 zfreeze : 1;
u32 msaa : 1;
u32 ssaa : 1;
u32 pad : 17;
u32 pad : 16;
u32 texMtxInfo_n_projection : 8; // 8x1 bit
u32 tevindref_bi0 : 3;
@ -86,6 +87,48 @@ struct pixel_shader_uid_data
}
}
inline u32 GetTevindirefCoord(int index)
{
if (index == 0)
{
return tevindref_bc0;
}
else if (index == 1)
{
return tevindref_bc1;
}
else if (index == 2)
{
return tevindref_bc3;
}
else if (index == 3)
{
return tevindref_bc4;
}
return 0;
}
inline u32 GetTevindirefMap(int index)
{
if (index == 0)
{
return tevindref_bi0;
}
else if (index == 1)
{
return tevindref_bi1;
}
else if (index == 2)
{
return tevindref_bi2;
}
else if (index == 3)
{
return tevindref_bi4;
}
return 0;
}
struct
{
// TODO: Can save a lot space by removing the padding bits