From 593bad3253c058a977e8413b919ff0a14442825b Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 9 May 2018 11:33:11 -0400 Subject: [PATCH] Atomic_Win32: Replace deprecated (and since been removed) barrier intrinsics As of VS 15.7, these seem to have been removed. Given we shouldn't have been using these for some time, just replace them with the standard library equivalent. This fixes building on Windows with VS 15.7 --- Source/Core/Common/Atomic_Win32.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Source/Core/Common/Atomic_Win32.h b/Source/Core/Common/Atomic_Win32.h index 1260cd72bb..37ea49fe93 100644 --- a/Source/Core/Common/Atomic_Win32.h +++ b/Source/Core/Common/Atomic_Win32.h @@ -8,6 +8,7 @@ #include +#include #include "Common/CommonTypes.h" // Atomic operations are performed in a single step by the CPU. It is @@ -64,8 +65,10 @@ inline T AtomicLoad(volatile T& src) template inline T AtomicLoadAcquire(volatile T& src) { - T result = src; // 32-bit reads are always atomic. - _ReadBarrier(); // Compiler instruction only. x86 loads always have acquire semantics. + // 32-bit reads are always atomic. + T result = src; + // Compiler instruction only. x86 loads always have acquire semantics. + std::atomic_thread_fence(std::memory_order_acquire); return result; } @@ -78,7 +81,8 @@ inline void AtomicStore(volatile T& dest, U value) template inline void AtomicStoreRelease(volatile T& dest, U value) { - _WriteBarrier(); // Compiler instruction only. x86 stores always have release semantics. + // Compiler instruction only. x86 stores always have release semantics. + std::atomic_thread_fence(std::memory_order_release); dest = (T)value; // 32-bit writes are always atomic. }