piwalker/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-07-25 07:09:48 -06:00
Code Issues Packages Projects Releases Wiki Activity

XEmitter: rename WriteVex to WriteVEX

Browse Source
This commit is contained in:
Tillmann Karras
2015-05-17 05:38:01 +02:00
parent 9e3f4df733
commit 18e9241637
2 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Source/Core/Common/x64Emitter.cpp
View File

@ -164,7 +164,7 @@ void OpArg::WriteREX(XEmitter *emit, int opBits, int bits, int customOp) const
} }
} }
void OpArg::WriteVex(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W) const void OpArg::WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W) const
{ {
int R = !(regOp1 & 8); int R = !(regOp1 & 8);
int X = !(indexReg & 8); int X = !(indexReg & 8);
@ -1412,7 +1412,7 @@ void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpA
int mmmmm = GetVEXmmmmm(op); int mmmmm = GetVEXmmmmm(op);
int pp = GetVEXpp(opPrefix); int pp = GetVEXpp(opPrefix);
// FIXME: we currently don't support 256-bit instructions, and "size" is not the vector size here // FIXME: we currently don't support 256-bit instructions, and "size" is not the vector size here
arg.WriteVex(this, regOp1, regOp2, 0, pp, mmmmm, W); arg.WriteVEX(this, regOp1, regOp2, 0, pp, mmmmm, W);
Write8(op & 0xFF); Write8(op & 0xFF);
arg.WriteRest(this, extrabytes, regOp1); arg.WriteRest(this, extrabytes, regOp1);
} }
@ -1424,7 +1424,7 @@ void XEmitter::WriteVEXOp(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg r
PanicAlert("VEX GPR instructions only support 32-bit and 64-bit modes!"); PanicAlert("VEX GPR instructions only support 32-bit and 64-bit modes!");
int mmmmm = GetVEXmmmmm(op); int mmmmm = GetVEXmmmmm(op);
int pp = GetVEXpp(opPrefix); int pp = GetVEXpp(opPrefix);
arg.WriteVex(this, regOp1, regOp2, 0, pp, mmmmm, size == 64); arg.WriteVEX(this, regOp1, regOp2, 0, pp, mmmmm, size == 64);
Write8(op & 0xFF); Write8(op & 0xFF);
arg.WriteRest(this, extrabytes, regOp1); arg.WriteRest(this, extrabytes, regOp1);
} }

2
Source/Core/Common/x64Emitter.h
View File

@ -146,7 +146,7 @@ struct OpArg
indexReg == b.indexReg && offset == b.offset; indexReg == b.indexReg && offset == b.offset;
} }
void WriteREX(XEmitter *emit, int opBits, int bits, int customOp = -1) const; void WriteREX(XEmitter *emit, int opBits, int bits, int customOp = -1) const;
void WriteVex(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const; void WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const; void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
void WriteFloatModRM(XEmitter *emit, FloatOp op); void WriteFloatModRM(XEmitter *emit, FloatOp op);
void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits); void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);