Core/Common: Fix typos

Found via `codespell -q 3 -S "./Externals,./Data/Sys/wiitdb-??.txt,*.po,*.pot" -L andf,asnd,bootup,brocken,bufferin,clen,collet,datas,delt,diety,extint,fpr,inout,inport,interm,nd,nin,ontop,pixelx,re-use,re-used,sav,stateman,strat,transer,wil`
This commit is contained in:
Luz Paz
2025-03-11 19:48:45 -04:00
parent de997d616f
commit 1b47dbf519
9 changed files with 12 additions and 12 deletions

View File

@ -2019,7 +2019,7 @@ void ARM64XEmitter::ABI_PushRegisters(BitSet32 registers)
if (!num_regs)
return;
// 8 byte per register, but 16 byte alignment, so we may have to padd one register.
// 8 byte per register, but 16 byte alignment, so we may have to pad one register.
// Only update the SP on the last write to avoid the dependency between those stores.
// The first push must adjust the SP, else a context switch may invalidate everything below SP.
@ -2062,7 +2062,7 @@ void ARM64XEmitter::ABI_PopRegisters(BitSet32 registers, BitSet32 ignore_mask)
else
second = {};
// 8 byte per register, but 16 byte alignment, so we may have to padd one register.
// 8 byte per register, but 16 byte alignment, so we may have to pad one register.
// Only update the SP on the last load to avoid the dependency between those loads.
// Fast load for all but the first (two) registers, this is always an even number.
@ -2904,7 +2904,7 @@ void ARM64FloatEmitter::ST1(u8 size, u8 count, IndexType type, ARM64Reg Rt, ARM6
{
ASSERT_MSG(DYNA_REC, !(count == 0 || count > 4), "Must have a count of 1 to 4 registers! ({})",
count);
ASSERT_MSG(DYNA_REC, type == IndexType::Post, "Only post indexing is supporte!");
ASSERT_MSG(DYNA_REC, type == IndexType::Post, "Only post indexing is supported!");
u32 opcode = 0;
if (count == 1)