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Merge pull request #12667 from JosJuice/ipl-oob
Core: Fix IPL device m_cursor overflow
This commit is contained in:
@ -296,10 +296,6 @@ void CEXIIPL::TransferByte(u8& data)
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DEBUG_LOG_FMT(EXPANSIONINTERFACE, "IPL-DEV data {} {:08x} {:02x}",
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DEBUG_LOG_FMT(EXPANSIONINTERFACE, "IPL-DEV data {} {:08x} {:02x}",
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m_command.is_write() ? "write" : "read", address, data);
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m_command.is_write() ? "write" : "read", address, data);
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#define IN_RANGE(x) (address >= x##_BASE && address < x##_BASE + x##_SIZE)
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#define DEV_ADDR(x) (address - x##_BASE)
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#define DEV_ADDR_CURSOR(x) (DEV_ADDR(x) + m_cursor++)
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auto UartFifoAccess = [&]() {
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auto UartFifoAccess = [&]() {
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if (m_command.is_write())
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if (m_command.is_write())
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{
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{
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@ -323,7 +319,9 @@ void CEXIIPL::TransferByte(u8& data)
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{
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{
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if (!m_command.is_write())
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if (!m_command.is_write())
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{
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{
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u32 dev_addr = DEV_ADDR_CURSOR(ROM);
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u32 dev_addr = address - ROM_BASE + m_cursor++;
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// TODO: Is this address wrapping correct? Needs a hardware test
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dev_addr %= ROM_SIZE;
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// Technically we should descramble here iff descrambling logic is enabled.
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// Technically we should descramble here iff descrambling logic is enabled.
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// At the moment, we pre-decrypt the whole thing and
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// At the moment, we pre-decrypt the whole thing and
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// ignore the "enabled" bit - see CEXIIPL::CEXIIPL
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// ignore the "enabled" bit - see CEXIIPL::CEXIIPL
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@ -346,18 +344,20 @@ void CEXIIPL::TransferByte(u8& data)
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}
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}
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}
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}
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}
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}
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else if (IN_RANGE(SRAM))
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else if (address >= SRAM_BASE && address < SRAM_BASE + SRAM_SIZE)
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{
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{
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auto& sram = m_system.GetSRAM();
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auto& sram = m_system.GetSRAM();
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u32 dev_addr = DEV_ADDR_CURSOR(SRAM);
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u32 dev_addr = address - SRAM_BASE + m_cursor++;
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// TODO: Is this address wrapping correct? Needs a hardware test
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dev_addr %= SRAM_SIZE;
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if (m_command.is_write())
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if (m_command.is_write())
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sram[dev_addr] = data;
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sram[dev_addr] = data;
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else
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else
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data = sram[dev_addr];
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data = sram[dev_addr];
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}
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}
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else if (IN_RANGE(UART))
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else if (address >= UART_BASE && address < UART_BASE + UART_SIZE)
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{
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{
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switch (DEV_ADDR(UART))
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switch (address - UART_BASE)
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{
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{
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case 0:
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case 0:
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// Seems to be 16byte fifo
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// Seems to be 16byte fifo
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@ -371,16 +371,17 @@ void CEXIIPL::TransferByte(u8& data)
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break;
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break;
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}
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}
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}
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}
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else if (IN_RANGE(WII_RTC) && DEV_ADDR(WII_RTC) == 0x20)
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else if (address >= WII_RTC_BASE && address < WII_RTC_BASE + WII_RTC_SIZE &&
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address - WII_RTC_BASE == 0x20)
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{
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{
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if (m_command.is_write())
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if (m_command.is_write())
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g_rtc_flags.m_hex = data;
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g_rtc_flags.m_hex = data;
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else
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else
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data = g_rtc_flags.m_hex;
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data = g_rtc_flags.m_hex;
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}
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}
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else if (IN_RANGE(EUART))
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else if (address >= EUART_BASE && address < EUART_BASE + EUART_SIZE)
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{
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{
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switch (DEV_ADDR(EUART))
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switch (address - EUART_BASE)
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{
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{
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case 0:
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case 0:
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// Writes 0xf2 then 0xf3 on EUART init. Just need to return non-zero
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// Writes 0xf2 then 0xf3 on EUART init. Just need to return non-zero
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@ -395,10 +396,6 @@ void CEXIIPL::TransferByte(u8& data)
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{
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{
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NOTICE_LOG_FMT(EXPANSIONINTERFACE, "IPL-DEV Accessing unknown device");
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NOTICE_LOG_FMT(EXPANSIONINTERFACE, "IPL-DEV Accessing unknown device");
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}
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}
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#undef DEV_ADDR_CURSOR
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#undef DEV_ADDR
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#undef IN_RANGE
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}
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}
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}
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}
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