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JitArm64_LoadStoreFloating: Use ScopedARM64Reg

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This commit is contained in:
Sintendo 2024-06-23 23:18:46 +02:00
parent 9420250046
commit 23327064f6
1 changed files with 3 additions and 6 deletions
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9
Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
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@ -268,14 +268,14 @@ void JitArm64::stfXX(UGeckoInstruction inst)
const bool have_single = fpr.IsSingle(inst.FS, true); const bool have_single = fpr.IsSingle(inst.FS, true);
ARM64Reg V0 = Arm64FPRCache::ScopedARM64Reg V0 =
fpr.R(inst.FS, want_single && have_single ? RegType::LowerPairSingle : RegType::LowerPair); fpr.R(inst.FS, want_single && have_single ? RegType::LowerPairSingle : RegType::LowerPair);
if (want_single && !have_single) if (want_single && !have_single)
{ {
const ARM64Reg single_reg = fpr.GetReg(); auto single_reg = fpr.GetScopedReg();
ConvertDoubleToSingleLower(inst.FS, single_reg, V0); ConvertDoubleToSingleLower(inst.FS, single_reg, V0);
V0 = single_reg; V0 = std::move(single_reg);
} }
gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30); gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
@ -425,9 +425,6 @@ void JitArm64::stfXX(UGeckoInstruction inst)
MOV(gpr.R(a), addr_reg); MOV(gpr.R(a), addr_reg);
} }
if (want_single && !have_single)
fpr.Unlock(V0);
gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30); gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0); fpr.Unlock(ARM64Reg::Q0);
if (!jo.fastmem) if (!jo.fastmem)