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VI: Respect DisplayControlRegister ENB bit

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When ENB is set to 0 (default), VI should not
generate clocks, and so shouldn't generate
output.
This commit is contained in:
booto
2015-09-03 04:05:37 +08:00
parent 3b65c4070c
commit 28d788ba2c
1 changed files with 4 additions and 1 deletions
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5
Source/Core/Core/HW/VideoInterface.cpp
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@ -110,7 +110,7 @@ void Preset(bool _bNTSC)
m_VerticalTimingRegister.EQU = 6; m_VerticalTimingRegister.EQU = 6;
m_VerticalTimingRegister.ACV = 0; m_VerticalTimingRegister.ACV = 0;
m_DisplayControlRegister.ENB = 1; m_DisplayControlRegister.ENB = 0;
m_DisplayControlRegister.FMT = _bNTSC ? 0 : 1; m_DisplayControlRegister.FMT = _bNTSC ? 0 : 1;
m_HTiming0.HLW = 429; m_HTiming0.HLW = 429;
@ -605,6 +605,9 @@ static void EndField()
// Run when: When a frame is scanned (progressive/interlace) // Run when: When a frame is scanned (progressive/interlace)
void Update() void Update()
{ {
if (!m_DisplayControlRegister.ENB)
return;
if (s_half_line_count == s_even_field_first_hl) if (s_half_line_count == s_even_field_first_hl)
{ {
BeginField(FIELD_EVEN); BeginField(FIELD_EVEN);