From 2b4f1aed40c75f30e81df5900c27399cfac6370e Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Wed, 7 Jan 2015 13:03:51 -0600
Subject: [PATCH] [AArch64] Minor shifted register adjustment.

If we have a shift amount that is the full length of the source register then we have an invalid instruction.
This can happen when dealing with a couple of PowerPC instructions.
This same adjustment is already in the ARMv7 emitter.
---
 Source/Core/Common/Arm64Emitter.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index 1c2273e220..cb3c60119e 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -238,9 +238,17 @@ public:
 		m_shifttype = shift_type;
 		m_type = TYPE_SHIFTEDREG;
 		if (Is64Bit(Rd))
+		{
 			m_width = WIDTH_64BIT;
+			if (shift == 64)
+				m_shift = 0;
+		}
 		else
+		{
 			m_width = WIDTH_32BIT;
+			if (shift == 32)
+				m_shift = 0;
+		}
 	}
 	TypeSpecifier GetType() const
 	{