From 2c2e06bf39318bfafd76201407d0e346f8a045fb Mon Sep 17 00:00:00 2001 From: JosJuice Date: Sun, 4 Dec 2022 11:37:49 +0100 Subject: [PATCH] Jit64: Add extra cases for reversible avx_op Optimization. --- .../Core/PowerPC/Jit64Common/EmuCodeBlock.cpp | 22 ++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp index bfe20ab458..02c8ba1893 100644 --- a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp +++ b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp @@ -748,10 +748,18 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), { (this->*sseOp)(regOp, arg2); } - else if (arg1.IsSimpleReg() && cpu_info.bAVX) + else if (reversible && arg2.IsSimpleReg(regOp)) + { + (this->*sseOp)(regOp, arg1); + } + else if (cpu_info.bAVX && arg1.IsSimpleReg()) { (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2); } + else if (cpu_info.bAVX && reversible && arg2.IsSimpleReg()) + { + (this->*avxOp)(regOp, arg2.GetSimpleReg(), arg1); + } else if (!arg2.IsSimpleReg(regOp)) { if (packed) @@ -760,13 +768,17 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), MOVSD(regOp, arg1); (this->*sseOp)(regOp, arg1 == arg2 ? R(regOp) : arg2); } - else if (reversible) + else if (reversible && !arg1.IsSimpleReg(regOp)) { - (this->*sseOp)(regOp, arg1); + if (packed) + MOVAPD(regOp, arg2); + else + MOVSD(regOp, arg2); + (this->*sseOp)(regOp, arg1 == arg2 ? R(regOp) : arg1); } else { - // The ugly case: regOp == arg2 without AVX, or with arg1 == memory + // The ugly case: Not reversible, and we have regOp == arg2 without AVX or with arg1 == memory if (!arg1.IsSimpleReg(XMM0)) MOVAPD(XMM0, arg1); if (cpu_info.bAVX) @@ -793,7 +805,7 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&, { (this->*sseOp)(regOp, arg2, imm); } - else if (arg1.IsSimpleReg() && cpu_info.bAVX) + else if (cpu_info.bAVX && arg1.IsSimpleReg()) { (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2, imm); }