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Merge pull request #12250 from Sintendo/dcbx-nit
Jit_LoadStore: Minor dcbx register optimizations
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@ -274,11 +274,11 @@ void Jit64::dcbx(UGeckoInstruction inst)
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// the upper bits for the DIV instruction in the downcount > 0 case.
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// the upper bits for the DIV instruction in the downcount > 0 case.
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XOR(32, R(RSCRATCH2), R(RSCRATCH2));
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XOR(32, R(RSCRATCH2), R(RSCRATCH2));
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MOV(32, R(reg_downcount), PPCSTATE(downcount));
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MOV(32, R(RSCRATCH), PPCSTATE(downcount));
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TEST(32, R(reg_downcount), R(reg_downcount)); // if (downcount <= 0)
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TEST(32, R(RSCRATCH), R(RSCRATCH)); // if (downcount <= 0)
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FixupBranch downcount_is_zero_or_negative = J_CC(CC_LE); // only do 1 invalidation; else:
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FixupBranch downcount_is_zero_or_negative = J_CC(CC_LE); // only do 1 invalidation; else:
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MOV(32, R(loop_counter), PPCSTATE_CTR);
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MOV(32, R(loop_counter), PPCSTATE_CTR);
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MOV(32, R(RSCRATCH), R(reg_downcount));
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MOV(32, R(reg_downcount), R(RSCRATCH));
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MOV(32, R(reg_cycle_count), Imm32(cycle_count_per_loop));
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MOV(32, R(reg_cycle_count), Imm32(cycle_count_per_loop));
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DIV(32, R(reg_cycle_count)); // RSCRATCH = downcount / cycle_count
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DIV(32, R(reg_cycle_count)); // RSCRATCH = downcount / cycle_count
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LEA(32, RSCRATCH2, MDisp(loop_counter, -1)); // RSCRATCH2 = CTR - 1
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LEA(32, RSCRATCH2, MDisp(loop_counter, -1)); // RSCRATCH2 = CTR - 1
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@ -291,10 +291,9 @@ void Jit64::dcbx(UGeckoInstruction inst)
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// registers.
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// registers.
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SUB(32, R(loop_counter), R(RSCRATCH2));
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SUB(32, R(loop_counter), R(RSCRATCH2));
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MOV(32, PPCSTATE_CTR, R(loop_counter)); // CTR -= RSCRATCH2
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MOV(32, PPCSTATE_CTR, R(loop_counter)); // CTR -= RSCRATCH2
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MOV(32, R(RSCRATCH), R(RSCRATCH2));
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IMUL(32, reg_cycle_count, R(RSCRATCH2));
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IMUL(32, RSCRATCH, R(reg_cycle_count));
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// ^ Note that this cannot overflow because it's limited by (downcount/cycle_count).
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// ^ Note that this cannot overflow because it's limited by (downcount/cycle_count).
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SUB(32, R(reg_downcount), R(RSCRATCH));
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SUB(32, R(reg_downcount), R(reg_cycle_count));
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MOV(32, PPCSTATE(downcount), R(reg_downcount)); // downcount -= (RSCRATCH2 * reg_cycle_count)
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MOV(32, PPCSTATE(downcount), R(reg_downcount)); // downcount -= (RSCRATCH2 * reg_cycle_count)
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SetJumpTarget(downcount_is_zero_or_negative);
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SetJumpTarget(downcount_is_zero_or_negative);
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