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Reformat all the things. Have fun with merge conflicts.
This commit is contained in:
Pierre Bourdon
@ -17,50 +17,46 @@
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namespace DX12
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{
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class PipelineStateCacheInserter;
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union RasterizerState
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{
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BitField<0, 2, D3D12_CULL_MODE> cull_mode;
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union RasterizerState {
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BitField<0, 2, D3D12_CULL_MODE> cull_mode;
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u32 hex;
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u32 hex;
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};
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union BlendState
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{
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BitField<0, 1, u32> blend_enable;
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BitField<1, 3, D3D12_BLEND_OP> blend_op;
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BitField<4, 4, u8> write_mask;
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BitField<8, 5, D3D12_BLEND> src_blend;
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BitField<13, 5, D3D12_BLEND> dst_blend;
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BitField<18, 1, u32> use_dst_alpha;
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union BlendState {
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BitField<0, 1, u32> blend_enable;
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BitField<1, 3, D3D12_BLEND_OP> blend_op;
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BitField<4, 4, u8> write_mask;
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BitField<8, 5, D3D12_BLEND> src_blend;
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BitField<13, 5, D3D12_BLEND> dst_blend;
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BitField<18, 1, u32> use_dst_alpha;
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u32 hex;
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u32 hex;
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};
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union SamplerState
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{
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BitField<0, 3, u32> min_filter;
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BitField<3, 1, u32> mag_filter;
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BitField<4, 8, u32> min_lod;
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BitField<12, 8, u32> max_lod;
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BitField<20, 8, s32> lod_bias;
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BitField<28, 2, u32> wrap_s;
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BitField<30, 2, u32> wrap_t;
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union SamplerState {
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BitField<0, 3, u32> min_filter;
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BitField<3, 1, u32> mag_filter;
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BitField<4, 8, u32> min_lod;
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BitField<12, 8, u32> max_lod;
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BitField<20, 8, s32> lod_bias;
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BitField<28, 2, u32> wrap_s;
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BitField<30, 2, u32> wrap_t;
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u32 hex;
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u32 hex;
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};
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struct SmallPsoDesc
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{
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D3D12_SHADER_BYTECODE gs_bytecode;
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D3D12_SHADER_BYTECODE ps_bytecode;
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D3D12_SHADER_BYTECODE vs_bytecode;
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D3DVertexFormat* input_layout;
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BlendState blend_state;
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RasterizerState rasterizer_state;
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ZMode depth_stencil_state;
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D3D12_SHADER_BYTECODE gs_bytecode;
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D3D12_SHADER_BYTECODE ps_bytecode;
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D3D12_SHADER_BYTECODE vs_bytecode;
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D3DVertexFormat* input_layout;
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BlendState blend_state;
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RasterizerState rasterizer_state;
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ZMode depth_stencil_state;
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};
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// The Bitfield members in BlendState, RasterizerState, and ZMode cause the..
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@ -69,124 +65,128 @@ struct SmallPsoDesc
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struct SmallPsoDiskDesc
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{
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u32 blend_state_hex;
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u32 rasterizer_state_hex;
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u32 depth_stencil_state_hex;
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PixelShaderUid ps_uid;
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VertexShaderUid vs_uid;
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GeometryShaderUid gs_uid;
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D3D12_PRIMITIVE_TOPOLOGY_TYPE topology;
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PortableVertexDeclaration vertex_declaration; // Used to construct the input layout.
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u32 blend_state_hex;
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u32 rasterizer_state_hex;
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u32 depth_stencil_state_hex;
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PixelShaderUid ps_uid;
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VertexShaderUid vs_uid;
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GeometryShaderUid gs_uid;
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D3D12_PRIMITIVE_TOPOLOGY_TYPE topology;
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PortableVertexDeclaration vertex_declaration; // Used to construct the input layout.
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};
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class StateCache
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{
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public:
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StateCache();
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StateCache();
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static void Init();
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static void Init();
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// Get D3D12 descs for the internal state bitfields.
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static D3D12_SAMPLER_DESC GetDesc12(SamplerState state);
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static D3D12_BLEND_DESC GetDesc12(BlendState state);
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static D3D12_RASTERIZER_DESC GetDesc12(RasterizerState state);
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static D3D12_DEPTH_STENCIL_DESC GetDesc12(ZMode state);
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// Get D3D12 descs for the internal state bitfields.
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static D3D12_SAMPLER_DESC GetDesc12(SamplerState state);
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static D3D12_BLEND_DESC GetDesc12(BlendState state);
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static D3D12_RASTERIZER_DESC GetDesc12(RasterizerState state);
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static D3D12_DEPTH_STENCIL_DESC GetDesc12(ZMode state);
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HRESULT GetPipelineStateObjectFromCache(D3D12_GRAPHICS_PIPELINE_STATE_DESC* pso_desc, ID3D12PipelineState** pso);
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HRESULT GetPipelineStateObjectFromCache(SmallPsoDesc* pso_desc, ID3D12PipelineState** pso, D3D12_PRIMITIVE_TOPOLOGY_TYPE topology, const GeometryShaderUid* gs_uid, const PixelShaderUid* ps_uid, const VertexShaderUid* vs_uid);
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HRESULT GetPipelineStateObjectFromCache(D3D12_GRAPHICS_PIPELINE_STATE_DESC* pso_desc,
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ID3D12PipelineState** pso);
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HRESULT GetPipelineStateObjectFromCache(SmallPsoDesc* pso_desc, ID3D12PipelineState** pso,
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D3D12_PRIMITIVE_TOPOLOGY_TYPE topology,
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const GeometryShaderUid* gs_uid,
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const PixelShaderUid* ps_uid,
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const VertexShaderUid* vs_uid);
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// Called when the MSAA count/quality changes. Invalidates all small PSOs.
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void OnMSAASettingsChanged();
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// Called when the MSAA count/quality changes. Invalidates all small PSOs.
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void OnMSAASettingsChanged();
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// Release all cached states and clear hash tables.
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void Clear();
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// Release all cached states and clear hash tables.
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void Clear();
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private:
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friend DX12::PipelineStateCacheInserter;
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friend DX12::PipelineStateCacheInserter;
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D3D12_GRAPHICS_PIPELINE_STATE_DESC m_current_pso_desc;
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D3D12_GRAPHICS_PIPELINE_STATE_DESC m_current_pso_desc;
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struct hash_pso_desc
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{
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size_t operator()(const D3D12_GRAPHICS_PIPELINE_STATE_DESC& pso_desc) const
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{
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return ((uintptr_t)pso_desc.PS.pShaderBytecode * 1000000) ^
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((uintptr_t)pso_desc.VS.pShaderBytecode * 1000) ^
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((uintptr_t)pso_desc.InputLayout.pInputElementDescs);
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}
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};
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struct hash_pso_desc
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{
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size_t operator()(const D3D12_GRAPHICS_PIPELINE_STATE_DESC& pso_desc) const
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{
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return ((uintptr_t)pso_desc.PS.pShaderBytecode * 1000000) ^ ((uintptr_t)pso_desc.VS.pShaderBytecode * 1000) ^ ((uintptr_t)pso_desc.InputLayout.pInputElementDescs);
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}
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};
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struct equality_pipeline_state_desc
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{
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bool operator()(const D3D12_GRAPHICS_PIPELINE_STATE_DESC& lhs,
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const D3D12_GRAPHICS_PIPELINE_STATE_DESC& rhs) const
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{
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return std::tie(
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lhs.PS.pShaderBytecode, lhs.VS.pShaderBytecode, lhs.GS.pShaderBytecode,
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lhs.RasterizerState.CullMode, lhs.DepthStencilState.DepthEnable,
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lhs.DepthStencilState.DepthFunc, lhs.DepthStencilState.DepthWriteMask,
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lhs.BlendState.RenderTarget[0].BlendEnable, lhs.BlendState.RenderTarget[0].BlendOp,
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lhs.BlendState.RenderTarget[0].DestBlend, lhs.BlendState.RenderTarget[0].SrcBlend,
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lhs.BlendState.RenderTarget[0].RenderTargetWriteMask, lhs.RTVFormats[0],
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lhs.SampleDesc.Count) ==
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std::tie(
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rhs.PS.pShaderBytecode, rhs.VS.pShaderBytecode, rhs.GS.pShaderBytecode,
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rhs.RasterizerState.CullMode, rhs.DepthStencilState.DepthEnable,
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rhs.DepthStencilState.DepthFunc, rhs.DepthStencilState.DepthWriteMask,
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rhs.BlendState.RenderTarget[0].BlendEnable, rhs.BlendState.RenderTarget[0].BlendOp,
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rhs.BlendState.RenderTarget[0].DestBlend, rhs.BlendState.RenderTarget[0].SrcBlend,
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rhs.BlendState.RenderTarget[0].RenderTargetWriteMask, rhs.RTVFormats[0],
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rhs.SampleDesc.Count);
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}
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};
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struct equality_pipeline_state_desc
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{
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bool operator()(const D3D12_GRAPHICS_PIPELINE_STATE_DESC& lhs, const D3D12_GRAPHICS_PIPELINE_STATE_DESC& rhs) const
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{
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return std::tie(lhs.PS.pShaderBytecode, lhs.VS.pShaderBytecode, lhs.GS.pShaderBytecode,
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lhs.RasterizerState.CullMode,
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lhs.DepthStencilState.DepthEnable,
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lhs.DepthStencilState.DepthFunc,
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lhs.DepthStencilState.DepthWriteMask,
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lhs.BlendState.RenderTarget[0].BlendEnable,
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lhs.BlendState.RenderTarget[0].BlendOp,
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lhs.BlendState.RenderTarget[0].DestBlend,
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lhs.BlendState.RenderTarget[0].SrcBlend,
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lhs.BlendState.RenderTarget[0].RenderTargetWriteMask,
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lhs.RTVFormats[0],
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lhs.SampleDesc.Count) ==
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std::tie(rhs.PS.pShaderBytecode, rhs.VS.pShaderBytecode, rhs.GS.pShaderBytecode,
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rhs.RasterizerState.CullMode,
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rhs.DepthStencilState.DepthEnable,
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rhs.DepthStencilState.DepthFunc,
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rhs.DepthStencilState.DepthWriteMask,
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rhs.BlendState.RenderTarget[0].BlendEnable,
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rhs.BlendState.RenderTarget[0].BlendOp,
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rhs.BlendState.RenderTarget[0].DestBlend,
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rhs.BlendState.RenderTarget[0].SrcBlend,
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rhs.BlendState.RenderTarget[0].RenderTargetWriteMask,
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rhs.RTVFormats[0],
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rhs.SampleDesc.Count);
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}
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};
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std::unordered_map<D3D12_GRAPHICS_PIPELINE_STATE_DESC, ID3D12PipelineState*, hash_pso_desc,
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equality_pipeline_state_desc>
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m_pso_map;
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std::unordered_map<D3D12_GRAPHICS_PIPELINE_STATE_DESC, ID3D12PipelineState*, hash_pso_desc, equality_pipeline_state_desc> m_pso_map;
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struct hash_small_pso_desc
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{
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size_t operator()(const SmallPsoDesc& pso_desc) const
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{
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return ((uintptr_t)pso_desc.vs_bytecode.pShaderBytecode << 10) ^
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((uintptr_t)pso_desc.ps_bytecode.pShaderBytecode) + pso_desc.blend_state.hex +
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pso_desc.depth_stencil_state.hex;
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}
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};
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struct hash_small_pso_desc
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{
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size_t operator()(const SmallPsoDesc& pso_desc) const
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{
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return ((uintptr_t)pso_desc.vs_bytecode.pShaderBytecode << 10) ^
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((uintptr_t)pso_desc.ps_bytecode.pShaderBytecode) +
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pso_desc.blend_state.hex +
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pso_desc.depth_stencil_state.hex;
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}
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};
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struct equality_small_pipeline_state_desc
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{
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bool operator()(const SmallPsoDesc& lhs, const SmallPsoDesc& rhs) const
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{
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return std::tie(lhs.ps_bytecode.pShaderBytecode, lhs.vs_bytecode.pShaderBytecode,
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lhs.gs_bytecode.pShaderBytecode, lhs.input_layout, lhs.blend_state.hex,
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lhs.depth_stencil_state.hex, lhs.rasterizer_state.hex) ==
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std::tie(rhs.ps_bytecode.pShaderBytecode, rhs.vs_bytecode.pShaderBytecode,
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rhs.gs_bytecode.pShaderBytecode, rhs.input_layout, rhs.blend_state.hex,
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rhs.depth_stencil_state.hex, rhs.rasterizer_state.hex);
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}
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};
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struct equality_small_pipeline_state_desc
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{
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bool operator()(const SmallPsoDesc& lhs, const SmallPsoDesc& rhs) const
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{
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return std::tie(lhs.ps_bytecode.pShaderBytecode, lhs.vs_bytecode.pShaderBytecode, lhs.gs_bytecode.pShaderBytecode,
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lhs.input_layout, lhs.blend_state.hex, lhs.depth_stencil_state.hex, lhs.rasterizer_state.hex) ==
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std::tie(rhs.ps_bytecode.pShaderBytecode, rhs.vs_bytecode.pShaderBytecode, rhs.gs_bytecode.pShaderBytecode,
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rhs.input_layout, rhs.blend_state.hex, rhs.depth_stencil_state.hex, rhs.rasterizer_state.hex);
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}
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};
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struct hash_shader_bytecode
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{
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size_t operator()(const D3D12_SHADER_BYTECODE& shader) const
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{
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return (uintptr_t)shader.pShaderBytecode;
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}
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};
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struct hash_shader_bytecode
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{
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size_t operator()(const D3D12_SHADER_BYTECODE& shader) const
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{
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return (uintptr_t)shader.pShaderBytecode;
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}
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};
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struct equality_shader_bytecode
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{
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bool operator()(const D3D12_SHADER_BYTECODE& lhs, const D3D12_SHADER_BYTECODE& rhs) const
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{
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return lhs.pShaderBytecode == rhs.pShaderBytecode;
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}
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};
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struct equality_shader_bytecode
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{
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bool operator()(const D3D12_SHADER_BYTECODE& lhs, const D3D12_SHADER_BYTECODE& rhs) const
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{
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return lhs.pShaderBytecode == rhs.pShaderBytecode;
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}
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};
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std::unordered_map<SmallPsoDesc, ID3D12PipelineState*, hash_small_pso_desc, equality_small_pipeline_state_desc> m_small_pso_map;
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std::unordered_map<SmallPsoDesc, ID3D12PipelineState*, hash_small_pso_desc,
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equality_small_pipeline_state_desc>
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m_small_pso_map;
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};
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} // namespace DX12
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