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Reformat all the things. Have fun with merge conflicts.

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This commit is contained in:
Pierre Bourdon
2016-06-24 10:43:46 +02:00
parent 2115e8a4a6
commit 3570c7f03a
1116 changed files with 187405 additions and 180344 deletions
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76
Source/Core/VideoCommon/PixelEngine.h
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@ -6,55 +6,57 @@
#include "Common/CommonTypes.h"
class PointerWrap;
namespace MMIO { class Mapping; }
namespace MMIO
{
class Mapping;
}
// internal hardware addresses
enum
{
PE_ZCONF = 0x00, // Z Config
PE_ALPHACONF = 0x02, // Alpha Config
PE_DSTALPHACONF = 0x04, // Destination Alpha Config
PE_ALPHAMODE = 0x06, // Alpha Mode Config
PE_ALPHAREAD = 0x08, // Alpha Read
PE_CTRL_REGISTER = 0x0a, // Control
PE_TOKEN_REG = 0x0e, // Token
PE_BBOX_LEFT = 0x10, // Bounding Box Left Pixel
PE_BBOX_RIGHT = 0x12, // Bounding Box Right Pixel
PE_BBOX_TOP = 0x14, // Bounding Box Top Pixel
PE_BBOX_BOTTOM = 0x16, // Bounding Box Bottom Pixel
PE_ZCONF = 0x00, // Z Config
PE_ALPHACONF = 0x02, // Alpha Config
PE_DSTALPHACONF = 0x04, // Destination Alpha Config
PE_ALPHAMODE = 0x06, // Alpha Mode Config
PE_ALPHAREAD = 0x08, // Alpha Read
PE_CTRL_REGISTER = 0x0a, // Control
PE_TOKEN_REG = 0x0e, // Token
PE_BBOX_LEFT = 0x10, // Bounding Box Left Pixel
PE_BBOX_RIGHT = 0x12, // Bounding Box Right Pixel
PE_BBOX_TOP = 0x14, // Bounding Box Top Pixel
PE_BBOX_BOTTOM = 0x16, // Bounding Box Bottom Pixel
// NOTE: Order not verified
// These indicate the number of quads that are being used as input/output for each particular stage
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18,
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e,
PE_PERF_ZCOMP_INPUT_L = 0x20,
PE_PERF_ZCOMP_INPUT_H = 0x22,
PE_PERF_ZCOMP_OUTPUT_L = 0x24,
PE_PERF_ZCOMP_OUTPUT_H = 0x26,
PE_PERF_BLEND_INPUT_L = 0x28,
PE_PERF_BLEND_INPUT_H = 0x2a,
PE_PERF_EFB_COPY_CLOCKS_L = 0x2c,
PE_PERF_EFB_COPY_CLOCKS_H = 0x2e,
// NOTE: Order not verified
// These indicate the number of quads that are being used as input/output for each particular
// stage
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18,
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e,
PE_PERF_ZCOMP_INPUT_L = 0x20,
PE_PERF_ZCOMP_INPUT_H = 0x22,
PE_PERF_ZCOMP_OUTPUT_L = 0x24,
PE_PERF_ZCOMP_OUTPUT_H = 0x26,
PE_PERF_BLEND_INPUT_L = 0x28,
PE_PERF_BLEND_INPUT_H = 0x2a,
PE_PERF_EFB_COPY_CLOCKS_L = 0x2c,
PE_PERF_EFB_COPY_CLOCKS_H = 0x2e,
};
namespace PixelEngine
{
// ReadMode specifies the returned alpha channel for EFB peeks
union UPEAlphaReadReg
{
u16 Hex;
struct
{
u16 ReadMode : 2;
u16 : 14;
};
union UPEAlphaReadReg {
u16 Hex;
struct
{
u16 ReadMode : 2;
u16 : 14;
};
};
void Init();
void DoState(PointerWrap &p);
void DoState(PointerWrap& p);
void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
@ -63,4 +65,4 @@ void SetToken(const u16 _token, const int _bSetTokenAcknowledge);
void SetFinish();
UPEAlphaReadReg GetAlphaReadMode();
} // end of namespace PixelEngine
} // end of namespace PixelEngine