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Merge pull request #646 from lioncash/warnings
Core: Fix warnings in JitRegCache
This commit is contained in:
commit
38d5197a2c
@ -2,6 +2,8 @@
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <cinttypes>
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#include "Core/PowerPC/Jit64/Jit.h"
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#include "Core/PowerPC/Jit64/JitAsm.h"
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#include "Core/PowerPC/Jit64/JitRegCache.h"
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@ -20,7 +22,7 @@ void RegCache::Start()
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xreg.free = true;
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xreg.dirty = false;
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xreg.locked = false;
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xreg.ppcReg = -1;
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xreg.ppcReg = INVALID_REG;
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}
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for (size_t i = 0; i < regs.size(); i++)
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{
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@ -81,9 +83,9 @@ void RegCache::UnlockAllX()
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X64Reg RegCache::GetFreeXReg()
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{
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int aCount;
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const int *aOrder = GetAllocationOrder(aCount);
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for (int i = 0; i < aCount; i++)
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size_t aCount;
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const int* aOrder = GetAllocationOrder(aCount);
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for (size_t i = 0; i < aCount; i++)
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{
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X64Reg xr = (X64Reg)aOrder[i];
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if (!xregs[xr].locked && xregs[xr].free)
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@ -94,12 +96,12 @@ X64Reg RegCache::GetFreeXReg()
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//Okay, not found :( Force grab one
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//TODO - add a pass to grab xregs whose ppcreg is not used in the next 3 instructions
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for (int i = 0; i < aCount; i++)
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for (size_t i = 0; i < aCount; i++)
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{
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X64Reg xr = (X64Reg)aOrder[i];
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if (xregs[xr].locked)
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continue;
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int preg = xregs[xr].ppcReg;
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size_t preg = xregs[xr].ppcReg;
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if (!regs[preg].locked)
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{
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StoreFromRegister(preg);
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@ -108,7 +110,7 @@ X64Reg RegCache::GetFreeXReg()
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}
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//Still no dice? Die!
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_assert_msg_(DYNA_REC, 0, "Regcache ran out of regs");
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return (X64Reg) -1;
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return INVALID_REG;
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}
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void RegCache::FlushR(X64Reg reg)
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@ -136,34 +138,36 @@ int RegCache::SanityCheck() const
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return 2;
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}
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else if (regs[i].location.IsImm())
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{
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return 3;
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}
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}
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}
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return 0;
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}
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void RegCache::DiscardRegContentsIfCached(int preg)
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void RegCache::DiscardRegContentsIfCached(size_t preg)
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{
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if (IsBound(preg))
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{
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X64Reg xr = regs[preg].location.GetSimpleReg();
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xregs[xr].free = true;
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xregs[xr].dirty = false;
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xregs[xr].ppcReg = -1;
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xregs[xr].ppcReg = INVALID_REG;
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regs[preg].away = false;
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regs[preg].location = GetDefaultLocation(preg);
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}
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}
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void GPRRegCache::SetImmediate32(int preg, u32 immValue)
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void GPRRegCache::SetImmediate32(size_t preg, u32 immValue)
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{
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DiscardRegContentsIfCached(preg);
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regs[preg].away = true;
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regs[preg].location = Imm32(immValue);
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}
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const int *GPRRegCache::GetAllocationOrder(int &count)
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const int* GPRRegCache::GetAllocationOrder(size_t& count)
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{
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static const int allocationOrder[] =
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{
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@ -182,7 +186,7 @@ const int *GPRRegCache::GetAllocationOrder(int &count)
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return allocationOrder;
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}
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const int *FPURegCache::GetAllocationOrder(int &count)
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const int* FPURegCache::GetAllocationOrder(size_t& count)
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{
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static const int allocationOrder[] =
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{
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@ -196,17 +200,17 @@ const int *FPURegCache::GetAllocationOrder(int &count)
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return allocationOrder;
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}
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OpArg GPRRegCache::GetDefaultLocation(int reg) const
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OpArg GPRRegCache::GetDefaultLocation(size_t reg) const
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{
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return M(&ppcState.gpr[reg]);
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}
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OpArg FPURegCache::GetDefaultLocation(int reg) const
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OpArg FPURegCache::GetDefaultLocation(size_t reg) const
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{
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return M(&ppcState.ps[reg][0]);
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}
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void RegCache::KillImmediate(int preg, bool doLoad, bool makeDirty)
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void RegCache::KillImmediate(size_t preg, bool doLoad, bool makeDirty)
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{
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if (regs[preg].away)
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{
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@ -217,7 +221,7 @@ void RegCache::KillImmediate(int preg, bool doLoad, bool makeDirty)
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}
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}
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void RegCache::BindToRegister(int i, bool doLoad, bool makeDirty)
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void RegCache::BindToRegister(size_t i, bool doLoad, bool makeDirty)
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{
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if (!regs[i].away && regs[i].location.IsImm())
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PanicAlert("Bad immediate");
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@ -232,7 +236,7 @@ void RegCache::BindToRegister(int i, bool doLoad, bool makeDirty)
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xregs[xr].dirty = makeDirty || regs[i].location.IsImm();
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if (doLoad)
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LoadRegister(i, xr);
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for (int j = 0; j < (int)regs.size(); j++)
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for (size_t j = 0; j < regs.size(); j++)
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{
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if (i != j && regs[j].location.IsSimpleReg() && regs[j].location.GetSimpleReg() == xr)
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{
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@ -255,7 +259,7 @@ void RegCache::BindToRegister(int i, bool doLoad, bool makeDirty)
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}
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}
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void RegCache::StoreFromRegister(int i, FlushMode mode)
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void RegCache::StoreFromRegister(size_t i, FlushMode mode)
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{
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if (regs[i].away)
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{
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@ -267,7 +271,7 @@ void RegCache::StoreFromRegister(int i, FlushMode mode)
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if (mode == FLUSH_ALL)
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{
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xregs[xr].free = true;
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xregs[xr].ppcReg = -1;
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xregs[xr].ppcReg = INVALID_REG;
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xregs[xr].dirty = false;
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}
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}
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@ -287,17 +291,17 @@ void RegCache::StoreFromRegister(int i, FlushMode mode)
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}
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}
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void GPRRegCache::LoadRegister(int preg, X64Reg newLoc)
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void GPRRegCache::LoadRegister(size_t preg, X64Reg newLoc)
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{
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emit->MOV(32, ::Gen::R(newLoc), regs[preg].location);
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}
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void GPRRegCache::StoreRegister(int preg, OpArg newLoc)
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void GPRRegCache::StoreRegister(size_t preg, OpArg newLoc)
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{
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emit->MOV(32, newLoc, regs[preg].location);
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}
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void FPURegCache::LoadRegister(int preg, X64Reg newLoc)
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void FPURegCache::LoadRegister(size_t preg, X64Reg newLoc)
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{
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if (!regs[preg].location.IsImm() && (regs[preg].location.offset & 0xF))
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{
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@ -306,7 +310,7 @@ void FPURegCache::LoadRegister(int preg, X64Reg newLoc)
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emit->MOVAPD(newLoc, regs[preg].location);
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}
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void FPURegCache::StoreRegister(int preg, OpArg newLoc)
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void FPURegCache::StoreRegister(size_t preg, OpArg newLoc)
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{
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emit->MOVAPD(newLoc, regs[preg].location.GetSimpleReg());
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}
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@ -323,7 +327,7 @@ void RegCache::Flush(FlushMode mode)
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{
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if (regs[i].locked)
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{
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PanicAlert("Someone forgot to unlock PPC reg %zu (X64 reg %i).", i, RX(i));
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PanicAlert("Someone forgot to unlock PPC reg %" PRIx64 " (X64 reg %i).", i, RX(i));
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}
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if (regs[i].away)
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{
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@ -333,7 +337,7 @@ void RegCache::Flush(FlushMode mode)
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}
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else
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{
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_assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %zu PC: %08x", i, PC);
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_assert_msg_(DYNA_REC,0,"Jit64 - Flush unhandled case, reg %" PRIx64 " PC: %08x", i, PC);
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}
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}
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}
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@ -25,7 +25,7 @@ struct PPCCachedReg
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struct X64CachedReg
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{
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int ppcReg;
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size_t ppcReg;
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bool dirty;
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bool free;
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bool locked;
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@ -46,7 +46,7 @@ protected:
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std::array<PPCCachedReg, 32> regs;
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std::array<X64CachedReg, NUMXREGS> xregs;
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virtual const int *GetAllocationOrder(int &count) = 0;
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virtual const int *GetAllocationOrder(size_t& count) = 0;
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XEmitter *emit;
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@ -56,7 +56,7 @@ public:
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virtual ~RegCache() {}
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void Start();
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void DiscardRegContentsIfCached(int preg);
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void DiscardRegContentsIfCached(size_t preg);
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void SetEmitter(XEmitter *emitter) {emit = emitter;}
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void FlushR(X64Reg reg);
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@ -72,24 +72,24 @@ public:
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void Flush(FlushMode mode = FLUSH_ALL);
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void Flush(PPCAnalyst::CodeOp *op) {Flush();}
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int SanityCheck() const;
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void KillImmediate(int preg, bool doLoad, bool makeDirty);
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void KillImmediate(size_t preg, bool doLoad, bool makeDirty);
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//TODO - instead of doload, use "read", "write"
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//read only will not set dirty flag
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void BindToRegister(int preg, bool doLoad = true, bool makeDirty = true);
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void StoreFromRegister(int preg, FlushMode mode = FLUSH_ALL);
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virtual void StoreRegister(int preg, OpArg newLoc) = 0;
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virtual void LoadRegister(int preg, X64Reg newLoc) = 0;
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void BindToRegister(size_t preg, bool doLoad = true, bool makeDirty = true);
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void StoreFromRegister(size_t preg, FlushMode mode = FLUSH_ALL);
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virtual void StoreRegister(size_t preg, OpArg newLoc) = 0;
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virtual void LoadRegister(size_t preg, X64Reg newLoc) = 0;
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const OpArg &R(int preg) const {return regs[preg].location;}
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X64Reg RX(int preg) const
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const OpArg &R(size_t preg) const {return regs[preg].location;}
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X64Reg RX(size_t preg) const
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{
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if (IsBound(preg))
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return regs[preg].location.GetSimpleReg();
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PanicAlert("Not so simple - %i", preg);
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return (X64Reg)-1;
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}
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virtual OpArg GetDefaultLocation(int reg) const = 0;
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virtual OpArg GetDefaultLocation(size_t reg) const = 0;
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// Register locking.
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void Lock(int p1, int p2=0xff, int p3=0xff, int p4=0xff);
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@ -97,12 +97,12 @@ public:
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void UnlockAll();
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void UnlockAllX();
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bool IsFreeX(int xreg) const
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bool IsFreeX(size_t xreg) const
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{
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return xregs[xreg].free && !xregs[xreg].locked;
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}
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bool IsBound(int preg) const
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bool IsBound(size_t preg) const
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{
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return regs[preg].away && regs[preg].location.IsSimpleReg();
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}
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@ -114,19 +114,19 @@ public:
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class GPRRegCache : public RegCache
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{
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public:
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void StoreRegister(int preg, OpArg newLoc) override;
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void LoadRegister(int preg, X64Reg newLoc) override;
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OpArg GetDefaultLocation(int reg) const override;
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const int *GetAllocationOrder(int &count) override;
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void SetImmediate32(int preg, u32 immValue);
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void StoreRegister(size_t preg, OpArg newLoc) override;
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void LoadRegister(size_t preg, X64Reg newLoc) override;
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OpArg GetDefaultLocation(size_t reg) const override;
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const int* GetAllocationOrder(size_t& count) override;
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void SetImmediate32(size_t preg, u32 immValue);
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};
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class FPURegCache : public RegCache
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{
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public:
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void StoreRegister(int preg, OpArg newLoc) override;
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void LoadRegister(int preg, X64Reg newLoc) override;
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const int *GetAllocationOrder(int &count) override;
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OpArg GetDefaultLocation(int reg) const override;
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void StoreRegister(size_t preg, OpArg newLoc) override;
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void LoadRegister(size_t preg, X64Reg newLoc) override;
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const int* GetAllocationOrder(size_t& count) override;
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OpArg GetDefaultLocation(size_t reg) const override;
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};
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