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Cleanup enum indentations.

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This commit is contained in:
Lioncash
2014-02-09 16:03:16 -05:00
parent e59f770ccb
commit 40182a48a5
65 changed files with 1031 additions and 1026 deletions
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38
Source/Core/VideoCommon/CPMemory.h
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@ -10,39 +10,39 @@
// Vertex array numbers
enum
{
ARRAY_POSITION = 0,
ARRAY_NORMAL = 1,
ARRAY_COLOR = 2,
ARRAY_COLOR2 = 3,
ARRAY_TEXCOORD0 = 4,
ARRAY_POSITION = 0,
ARRAY_NORMAL = 1,
ARRAY_COLOR = 2,
ARRAY_COLOR2 = 3,
ARRAY_TEXCOORD0 = 4,
};
// Vertex components
enum
{
NOT_PRESENT = 0,
DIRECT = 1,
INDEX8 = 2,
INDEX16 = 3,
DIRECT = 1,
INDEX8 = 2,
INDEX16 = 3,
};
enum
{
FORMAT_UBYTE = 0, // 2 Cmp
FORMAT_BYTE = 1, // 3 Cmp
FORMAT_USHORT = 2,
FORMAT_SHORT = 3,
FORMAT_FLOAT = 4,
FORMAT_UBYTE = 0, // 2 Cmp
FORMAT_BYTE = 1, // 3 Cmp
FORMAT_USHORT = 2,
FORMAT_SHORT = 3,
FORMAT_FLOAT = 4,
};
enum
{
FORMAT_16B_565 = 0, // NA
FORMAT_24B_888 = 1,
FORMAT_32B_888x = 2,
FORMAT_16B_4444 = 3,
FORMAT_24B_6666 = 4,
FORMAT_32B_8888 = 5,
FORMAT_16B_565 = 0, // NA
FORMAT_24B_888 = 1,
FORMAT_32B_888x = 2,
FORMAT_16B_4444 = 3,
FORMAT_24B_6666 = 4,
FORMAT_32B_8888 = 5,
};
enum

84
Source/Core/VideoCommon/CommandProcessor.h
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@ -27,48 +27,48 @@ extern volatile bool interruptFinishWaiting;
// internal hardware addresses
enum
{
STATUS_REGISTER = 0x00,
CTRL_REGISTER = 0x02,
CLEAR_REGISTER = 0x04,
PERF_SELECT = 0x06,
FIFO_TOKEN_REGISTER = 0x0E,
FIFO_BOUNDING_BOX_LEFT = 0x10,
FIFO_BOUNDING_BOX_RIGHT = 0x12,
FIFO_BOUNDING_BOX_TOP = 0x14,
FIFO_BOUNDING_BOX_BOTTOM = 0x16,
FIFO_BASE_LO = 0x20,
FIFO_BASE_HI = 0x22,
FIFO_END_LO = 0x24,
FIFO_END_HI = 0x26,
FIFO_HI_WATERMARK_LO = 0x28,
FIFO_HI_WATERMARK_HI = 0x2a,
FIFO_LO_WATERMARK_LO = 0x2c,
FIFO_LO_WATERMARK_HI = 0x2e,
FIFO_RW_DISTANCE_LO = 0x30,
FIFO_RW_DISTANCE_HI = 0x32,
FIFO_WRITE_POINTER_LO = 0x34,
FIFO_WRITE_POINTER_HI = 0x36,
FIFO_READ_POINTER_LO = 0x38,
FIFO_READ_POINTER_HI = 0x3A,
FIFO_BP_LO = 0x3C,
FIFO_BP_HI = 0x3E,
XF_RASBUSY_L = 0x40,
XF_RASBUSY_H = 0x42,
XF_CLKS_L = 0x44,
XF_CLKS_H = 0x46,
XF_WAIT_IN_L = 0x48,
XF_WAIT_IN_H = 0x4a,
XF_WAIT_OUT_L = 0x4c,
XF_WAIT_OUT_H = 0x4e,
VCACHE_METRIC_CHECK_L = 0x50,
VCACHE_METRIC_CHECK_H = 0x52,
VCACHE_METRIC_MISS_L = 0x54,
VCACHE_METRIC_MISS_H = 0x56,
VCACHE_METRIC_STALL_L = 0x58,
VCACHE_METRIC_STALL_H = 0x5A,
CLKS_PER_VTX_IN_L = 0x60,
CLKS_PER_VTX_IN_H = 0x62,
CLKS_PER_VTX_OUT = 0x64,
STATUS_REGISTER = 0x00,
CTRL_REGISTER = 0x02,
CLEAR_REGISTER = 0x04,
PERF_SELECT = 0x06,
FIFO_TOKEN_REGISTER = 0x0E,
FIFO_BOUNDING_BOX_LEFT = 0x10,
FIFO_BOUNDING_BOX_RIGHT = 0x12,
FIFO_BOUNDING_BOX_TOP = 0x14,
FIFO_BOUNDING_BOX_BOTTOM = 0x16,
FIFO_BASE_LO = 0x20,
FIFO_BASE_HI = 0x22,
FIFO_END_LO = 0x24,
FIFO_END_HI = 0x26,
FIFO_HI_WATERMARK_LO = 0x28,
FIFO_HI_WATERMARK_HI = 0x2a,
FIFO_LO_WATERMARK_LO = 0x2c,
FIFO_LO_WATERMARK_HI = 0x2e,
FIFO_RW_DISTANCE_LO = 0x30,
FIFO_RW_DISTANCE_HI = 0x32,
FIFO_WRITE_POINTER_LO = 0x34,
FIFO_WRITE_POINTER_HI = 0x36,
FIFO_READ_POINTER_LO = 0x38,
FIFO_READ_POINTER_HI = 0x3A,
FIFO_BP_LO = 0x3C,
FIFO_BP_HI = 0x3E,
XF_RASBUSY_L = 0x40,
XF_RASBUSY_H = 0x42,
XF_CLKS_L = 0x44,
XF_CLKS_H = 0x46,
XF_WAIT_IN_L = 0x48,
XF_WAIT_IN_H = 0x4a,
XF_WAIT_OUT_L = 0x4c,
XF_WAIT_OUT_H = 0x4e,
VCACHE_METRIC_CHECK_L = 0x50,
VCACHE_METRIC_CHECK_H = 0x52,
VCACHE_METRIC_MISS_L = 0x54,
VCACHE_METRIC_MISS_H = 0x56,
VCACHE_METRIC_STALL_L = 0x58,
VCACHE_METRIC_STALL_H = 0x5A,
CLKS_PER_VTX_IN_L = 0x60,
CLKS_PER_VTX_IN_H = 0x62,
CLKS_PER_VTX_OUT = 0x64,
};
enum

32
Source/Core/VideoCommon/Debugger.h
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@ -27,27 +27,27 @@ public:
};
enum PauseEvent {
NOT_PAUSE = 0,
NEXT_FRAME = 1<<0,
NEXT_FLUSH = 1<<1,
NOT_PAUSE = 0,
NEXT_FRAME = 1<<0,
NEXT_FLUSH = 1<<1,
NEXT_PIXEL_SHADER_CHANGE = 1<<2,
NEXT_VERTEX_SHADER_CHANGE = 1<<3,
NEXT_TEXTURE_CHANGE = 1<<4,
NEXT_NEW_TEXTURE = 1<<5,
NEXT_PIXEL_SHADER_CHANGE = 1<<2,
NEXT_VERTEX_SHADER_CHANGE = 1<<3,
NEXT_TEXTURE_CHANGE = 1<<4,
NEXT_NEW_TEXTURE = 1<<5,
NEXT_XFB_CMD = 1<<6, // TODO
NEXT_EFB_CMD = 1<<7, // TODO
NEXT_XFB_CMD = 1<<6, // TODO
NEXT_EFB_CMD = 1<<7, // TODO
NEXT_MATRIX_CMD = 1<<8, // TODO
NEXT_VERTEX_CMD = 1<<9, // TODO
NEXT_TEXTURE_CMD = 1<<10, // TODO
NEXT_LIGHT_CMD = 1<<11, // TODO
NEXT_FOG_CMD = 1<<12, // TODO
NEXT_MATRIX_CMD = 1<<8, // TODO
NEXT_VERTEX_CMD = 1<<9, // TODO
NEXT_TEXTURE_CMD = 1<<10, // TODO
NEXT_LIGHT_CMD = 1<<11, // TODO
NEXT_FOG_CMD = 1<<12, // TODO
NEXT_SET_TLUT = 1<<13, // TODO
NEXT_SET_TLUT = 1<<13, // TODO
NEXT_ERROR = 1<<14, // TODO
NEXT_ERROR = 1<<14, // TODO
};
extern GFXDebuggerBase *g_pdebugger;

32
Source/Core/VideoCommon/DriverDetails.h
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@ -9,10 +9,10 @@ namespace DriverDetails
// Enum of supported operating systems
enum OS
{
OS_ALL = (1 << 0),
OS_ALL = (1 << 0),
OS_WINDOWS = (1 << 1),
OS_LINUX = (1 << 2),
OS_OSX = (1 << 3),
OS_LINUX = (1 << 2),
OS_OSX = (1 << 3),
OS_ANDROID = (1 << 4),
};
// Enum of known vendors
@ -36,21 +36,21 @@ namespace DriverDetails
enum Driver
{
DRIVER_ALL = 0,
DRIVER_NVIDIA, // Official Nvidia, including mobile GPU
DRIVER_NOUVEAU, // OSS nouveau
DRIVER_ATI, // Official ATI
DRIVER_R600, // OSS Radeon
DRIVER_INTEL, // Official Intel
DRIVER_I965, // OSS Intel
DRIVER_ARM_4XX, // Official Mali driver
DRIVER_ARM_T6XX, // Official Mali driver
DRIVER_LIMA, // OSS Mali driver
DRIVER_NVIDIA, // Official Nvidia, including mobile GPU
DRIVER_NOUVEAU, // OSS nouveau
DRIVER_ATI, // Official ATI
DRIVER_R600, // OSS Radeon
DRIVER_INTEL, // Official Intel
DRIVER_I965, // OSS Intel
DRIVER_ARM_4XX, // Official Mali driver
DRIVER_ARM_T6XX, // Official Mali driver
DRIVER_LIMA, // OSS Mali driver
DRIVER_QUALCOMM_3XX, // Official Adreno driver 3xx
DRIVER_QUALCOMM_2XX, // Official Adreno driver 2xx
DRIVER_FREEDRENO, // OSS Adreno driver
DRIVER_IMGTEC, // OSS PowerVR driver
DRIVER_VIVANTE, // Official vivante driver
DRIVER_UNKNOWN // Unknown driver, default to official hardware driver
DRIVER_FREEDRENO, // OSS Adreno driver
DRIVER_IMGTEC, // OSS PowerVR driver
DRIVER_VIVANTE, // Official vivante driver
DRIVER_UNKNOWN // Unknown driver, default to official hardware driver
};
// Enum of known bugs

4
Source/Core/VideoCommon/PixelEngine.cpp
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@ -111,8 +111,8 @@ bool bbox_active;
enum
{
INT_CAUSE_PE_TOKEN = 0x200, // GP Token
INT_CAUSE_PE_FINISH = 0x400, // GP Finished
INT_CAUSE_PE_TOKEN = 0x200, // GP Token
INT_CAUSE_PE_FINISH = 0x400, // GP Finished
};
void DoState(PointerWrap &p)

44
Source/Core/VideoCommon/PixelEngine.h
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@ -11,32 +11,32 @@ class PointerWrap;
// internal hardware addresses
enum
{
PE_ZCONF = 0x00, // Z Config
PE_ALPHACONF = 0x02, // Alpha Config
PE_DSTALPHACONF = 0x04, // Destination Alpha Config
PE_ALPHAMODE = 0x06, // Alpha Mode Config
PE_ALPHAREAD = 0x08, // Alpha Read
PE_ZCONF = 0x00, // Z Config
PE_ALPHACONF = 0x02, // Alpha Config
PE_DSTALPHACONF = 0x04, // Destination Alpha Config
PE_ALPHAMODE = 0x06, // Alpha Mode Config
PE_ALPHAREAD = 0x08, // Alpha Read
PE_CTRL_REGISTER = 0x0a, // Control
PE_TOKEN_REG = 0x0e, // Token
PE_BBOX_LEFT = 0x10, // Flip Left
PE_BBOX_RIGHT = 0x12, // Flip Right
PE_BBOX_TOP = 0x14, // Flip Top
PE_BBOX_BOTTOM = 0x16, // Flip Bottom
PE_TOKEN_REG = 0x0e, // Token
PE_BBOX_LEFT = 0x10, // Flip Left
PE_BBOX_RIGHT = 0x12, // Flip Right
PE_BBOX_TOP = 0x14, // Flip Top
PE_BBOX_BOTTOM = 0x16, // Flip Bottom
// NOTE: Order not verified
// These indicate the number of quads that are being used as input/output for each particular stage
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18,
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e,
PE_PERF_ZCOMP_INPUT_L = 0x20,
PE_PERF_ZCOMP_INPUT_H = 0x22,
PE_PERF_ZCOMP_OUTPUT_L = 0x24,
PE_PERF_ZCOMP_OUTPUT_H = 0x26,
PE_PERF_BLEND_INPUT_L = 0x28,
PE_PERF_BLEND_INPUT_H = 0x2a,
PE_PERF_EFB_COPY_CLOCKS_L = 0x2c,
PE_PERF_EFB_COPY_CLOCKS_H = 0x2e,
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18,
PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c,
PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e,
PE_PERF_ZCOMP_INPUT_L = 0x20,
PE_PERF_ZCOMP_INPUT_H = 0x22,
PE_PERF_ZCOMP_OUTPUT_L = 0x24,
PE_PERF_ZCOMP_OUTPUT_H = 0x26,
PE_PERF_BLEND_INPUT_L = 0x28,
PE_PERF_BLEND_INPUT_H = 0x2a,
PE_PERF_EFB_COPY_CLOCKS_L = 0x2c,
PE_PERF_EFB_COPY_CLOCKS_H = 0x2e,
};
namespace PixelEngine

4
Source/Core/VideoCommon/VertexLoader.h
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@ -105,8 +105,8 @@ public:
private:
enum
{
NRM_ZERO = 0,
NRM_ONE = 1,
NRM_ZERO = 0,
NRM_ONE = 1,
NRM_THREE = 3,
};

4
Source/Core/VideoCommon/VideoCommon.h
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@ -85,8 +85,8 @@ struct TargetRectangle : public MathUtil::Rectangle<int>
typedef enum
{
API_OPENGL = 1,
API_D3D = 2,
API_NONE = 3
API_D3D = 2,
API_NONE = 3
} API_TYPE;
inline u32 RGBA8ToRGBA6ToRGBA8(u32 src)

12
Source/Core/VideoCommon/VideoConfig.h
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@ -24,14 +24,16 @@
#define CONF_SAVETARGETS 8
#define CONF_SAVESHADERS 16
enum AspectMode {
ASPECT_AUTO = 0,
enum AspectMode
{
ASPECT_AUTO = 0,
ASPECT_FORCE_16_9 = 1,
ASPECT_FORCE_4_3 = 2,
ASPECT_STRETCH = 3,
ASPECT_FORCE_4_3 = 2,
ASPECT_STRETCH = 3,
};
enum EFBScale {
enum EFBScale
{
SCALE_FORCE_INTEGRAL = -1,
SCALE_AUTO,
SCALE_AUTO_INTEGRAL,