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More FIFO work. I've implemented intelligent mechanism in GatherPipeBursted to prevent "FIFO is overflown by GatherPipe!". I commented HiWatermark_Tighter parameter. If Hopefully this patch fix this issue. I will delete this definitely. I tested StarFox for 20 minutes and works really fine. :) This patch also can help when the CPU go ahead the GPU and sync in better way.

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Plus: I added a _assert_msg_ in FIFO loop when the WriteDistance is negative. Please if that happens report it, this can help to solve strange issues with wrong WriteDistances.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6495 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Marcos Vitali
2010-11-28 20:12:41 +00:00
parent c540995193
commit 40c4e5f9a7
2 changed files with 28 additions and 13 deletions
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37
Source/Core/VideoCommon/Src/CommandProcessor.cpp
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@ -526,8 +526,8 @@ void Write16(const u16 _Value, const u32 _Address)
break;
case FIFO_HI_WATERMARK_HI:
WriteHigh((u32 &)fifo.CPHiWatermark, _Value);
// Tune this when you see lots of FIFO overflown by GatherPipe
HiWatermark_Tighter = fifo.CPHiWatermark - 32 * g_ActiveConfig.iFIFOWatermarkTightness;
// Tune this when you see lots of FIFO overflown by GatherPipe
//HiWatermark_Tighter = fifo.CPHiWatermark - 32 * g_ActiveConfig.iFIFOWatermarkTightness;
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_HI_WATERMARK_HI : %04x", _Value);
break;
@ -625,21 +625,32 @@ void STACKALIGN GatherPipeBursted()
if (g_VideoInitialize.bOnThread)
{
// A little trick to prevent FIFO from overflown in dual core mode (n < 100 to avoid dead lock)
for (int cnt = 0; fifo.CPReadWriteDistance > fifo.CPEnd - fifo.CPBase && cnt < 100; cnt++)
Common::SwitchCurrentThread();
if (fifo.CPReadWriteDistance >= fifo.CPHiWatermark)
{
// A little trick to prevent FIFO from overflown in dual core mode
while (fifo.bFF_GPReadEnable && (fifo.CPReadWriteDistance >= fifo.CPHiWatermark))
Common::YieldCPU();
if (!m_CPStatusReg.OverflowHiWatermark)
{
m_CPStatusReg.OverflowHiWatermark = true;
if (m_CPCtrlReg.FifoOverflowIntEnable)
UpdateInterrupts();
}
}
}
else
{
CatchUpGPU();
}
// The interrupt latency in Dolphin is much longer than Hardware, so we must be more vigilant on Watermark
if (!m_CPStatusReg.OverflowHiWatermark && fifo.CPReadWriteDistance >= HiWatermark_Tighter)
{
m_CPStatusReg.OverflowHiWatermark = true;
if (m_CPCtrlReg.FifoOverflowIntEnable)
UpdateInterrupts();
if (!m_CPStatusReg.OverflowHiWatermark && fifo.CPReadWriteDistance >= fifo.CPHiWatermark)
{
m_CPStatusReg.OverflowHiWatermark = true;
if (m_CPCtrlReg.FifoOverflowIntEnable)
UpdateInterrupts();
}
}
_assert_msg_(COMMANDPROCESSOR, fifo.CPReadWriteDistance <= fifo.CPEnd - fifo.CPBase,