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Jit64: remove unused FlushMode enum

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This commit is contained in:
degasus
2014-06-02 08:24:25 +02:00
parent 1ef7dd68ef
commit 4545fa589d
6 changed files with 37 additions and 41 deletions
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28
Source/Core/Core/PowerPC/Jit64/Jit.cpp
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@ -207,8 +207,8 @@ void Jit64::Shutdown()
// This is only called by FallBackToInterpreter() in this file. It will execute an instruction with the interpreter functions. // This is only called by FallBackToInterpreter() in this file. It will execute an instruction with the interpreter functions.
void Jit64::WriteCallInterpreter(UGeckoInstruction inst) void Jit64::WriteCallInterpreter(UGeckoInstruction inst)
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
if (js.isLastInstruction) if (js.isLastInstruction)
{ {
MOV(32, M(&PC), Imm32(js.compilerPC)); MOV(32, M(&PC), Imm32(js.compilerPC));
@ -230,8 +230,8 @@ void Jit64::FallBackToInterpreter(UGeckoInstruction _inst)
void Jit64::HLEFunction(UGeckoInstruction _inst) void Jit64::HLEFunction(UGeckoInstruction _inst)
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex); ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
} }
@ -543,8 +543,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
{ {
if ((opinfo->flags & FL_USE_FPU) && !js.firstFPInstructionFound) if ((opinfo->flags & FL_USE_FPU) && !js.firstFPInstructionFound)
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
//This instruction uses FPU - needs to add FP exception bailout //This instruction uses FPU - needs to add FP exception bailout
TEST(32, M(&PowerPC::ppcState.msr), Imm32(1 << 13)); // Test FP enabled bit TEST(32, M(&PowerPC::ppcState.msr), Imm32(1 << 13)); // Test FP enabled bit
@ -564,8 +564,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
// Add an external exception check if the instruction writes to the FIFO. // Add an external exception check if the instruction writes to the FIFO.
if (jit->js.fifoWriteAddresses.find(ops[i].address) != jit->js.fifoWriteAddresses.end()) if (jit->js.fifoWriteAddresses.find(ops[i].address) != jit->js.fifoWriteAddresses.end())
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI | EXCEPTION_PROGRAM | EXCEPTION_SYSCALL | EXCEPTION_FPU_UNAVAILABLE | EXCEPTION_DSI | EXCEPTION_ALIGNMENT)); TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI | EXCEPTION_PROGRAM | EXCEPTION_SYSCALL | EXCEPTION_FPU_UNAVAILABLE | EXCEPTION_DSI | EXCEPTION_ALIGNMENT));
FixupBranch clearInt = J_CC(CC_NZ, true); FixupBranch clearInt = J_CC(CC_NZ, true);
@ -587,8 +587,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
if (Core::g_CoreStartupParameter.bEnableDebugging && breakpoints.IsAddressBreakPoint(ops[i].address) && GetState() != CPU_STEPPING) if (Core::g_CoreStartupParameter.bEnableDebugging && breakpoints.IsAddressBreakPoint(ops[i].address) && GetState() != CPU_STEPPING)
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
MOV(32, M(&PC), Imm32(ops[i].address)); MOV(32, M(&PC), Imm32(ops[i].address));
ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints)); ABI_CallFunction(reinterpret_cast<void *>(&PowerPC::CheckBreakPoints));
@ -604,8 +604,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
if (js.memcheck && (opinfo->flags & FL_LOADSTORE)) if (js.memcheck && (opinfo->flags & FL_LOADSTORE))
{ {
// In case we are about to jump to the dispatcher, flush regs // In case we are about to jump to the dispatcher, flush regs
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_DSI)); TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_DSI));
FixupBranch noMemException = J_CC(CC_Z, true); FixupBranch noMemException = J_CC(CC_Z, true);
@ -672,8 +672,8 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
if (code_block.m_broken) if (code_block.m_broken)
{ {
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
WriteExit(nextPC); WriteExit(nextPC);
} }

2
Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp
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@ -362,7 +362,7 @@ void FPURegCache::StoreFromRegister(int i)
} }
} }
void RegCache::Flush(FlushMode mode) void RegCache::Flush()
{ {
for (int i = 0; i < NUMXREGS; i++) for (int i = 0; i < NUMXREGS; i++)
{ {

8
Source/Core/Core/PowerPC/Jit64/JitRegCache.h
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@ -7,10 +7,6 @@
#include "Common/x64Emitter.h" #include "Common/x64Emitter.h"
using namespace Gen; using namespace Gen;
enum FlushMode
{
FLUSH_ALL
};
enum GrabMode enum GrabMode
{ {
@ -79,8 +75,8 @@ public:
FlushR(reg1); FlushR(reg2); FlushR(reg1); FlushR(reg2);
LockX(reg1); LockX(reg2); LockX(reg1); LockX(reg2);
} }
virtual void Flush(FlushMode mode); virtual void Flush();
virtual void Flush(PPCAnalyst::CodeOp *op) {Flush(FLUSH_ALL);} virtual void Flush(PPCAnalyst::CodeOp *op) {Flush();}
int SanityCheck() const; int SanityCheck() const;
void KillImmediate(int preg, bool doLoad, bool makeDirty); void KillImmediate(int preg, bool doLoad, bool makeDirty);

24
Source/Core/Core/PowerPC/Jit64/Jit_Branch.cpp
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@ -26,8 +26,8 @@ void Jit64::sc(UGeckoInstruction inst)
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITBranchOff) JITDISABLE(bJITBranchOff)
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
MOV(32, M(&PC), Imm32(js.compilerPC + 4)); MOV(32, M(&PC), Imm32(js.compilerPC + 4));
LOCK(); LOCK();
OR(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_SYSCALL)); OR(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_SYSCALL));
@ -39,8 +39,8 @@ void Jit64::rfi(UGeckoInstruction inst)
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITBranchOff) JITDISABLE(bJITBranchOff)
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
// See Interpreter rfi for details // See Interpreter rfi for details
const u32 mask = 0x87C0FFFF; const u32 mask = 0x87C0FFFF;
const u32 clearMSR13 = 0xFFFBFFFF; // Mask used to clear the bit MSR[13] const u32 clearMSR13 = 0xFFFBFFFF; // Mask used to clear the bit MSR[13]
@ -71,8 +71,8 @@ void Jit64::bx(UGeckoInstruction inst)
return; return;
} }
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
u32 destination; u32 destination;
if (inst.AA) if (inst.AA)
@ -104,8 +104,8 @@ void Jit64::bcx(UGeckoInstruction inst)
// USES_CR // USES_CR
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
FixupBranch pCTRDontBranch; FixupBranch pCTRDontBranch;
if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR
@ -151,8 +151,8 @@ void Jit64::bcctrx(UGeckoInstruction inst)
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITBranchOff) JITDISABLE(bJITBranchOff)
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
// bcctrx doesn't decrement and/or test CTR // bcctrx doesn't decrement and/or test CTR
_dbg_assert_msg_(POWERPC, inst.BO_2 & BO_DONT_DECREMENT_FLAG, "bcctrx with decrement and test CTR option is invalid!"); _dbg_assert_msg_(POWERPC, inst.BO_2 & BO_DONT_DECREMENT_FLAG, "bcctrx with decrement and test CTR option is invalid!");
@ -202,8 +202,8 @@ void Jit64::bclrx(UGeckoInstruction inst)
INSTRUCTION_START INSTRUCTION_START
JITDISABLE(bJITBranchOff) JITDISABLE(bJITBranchOff)
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
FixupBranch pCTRDontBranch; FixupBranch pCTRDontBranch;
if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR

12
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -386,8 +386,8 @@ void Jit64::cmpXX(UGeckoInstruction inst)
{ {
js.downcountAmount++; js.downcountAmount++;
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
int test_bit = 8 >> (js.next_inst.BI & 3); int test_bit = 8 >> (js.next_inst.BI & 3);
u8 conditionResult = (js.next_inst.BO & BO_BRANCH_IF_TRUE) ? test_bit : 0; u8 conditionResult = (js.next_inst.BO & BO_BRANCH_IF_TRUE) ? test_bit : 0;
@ -485,8 +485,8 @@ void Jit64::cmpXX(UGeckoInstruction inst)
// if (rand() & 1) // if (rand() & 1)
// std::swap(destination1, destination2), condition = !condition; // std::swap(destination1, destination2), condition = !condition;
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
FixupBranch pLesser = J_CC(less_than); FixupBranch pLesser = J_CC(less_than);
FixupBranch pGreater = J_CC(greater_than); FixupBranch pGreater = J_CC(greater_than);
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2)); // == 0 MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2)); // == 0
@ -2182,8 +2182,8 @@ void Jit64::twx(UGeckoInstruction inst)
s32 a = inst.RA; s32 a = inst.RA;
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
if (inst.OPCD == 3) // twi if (inst.OPCD == 3) // twi
CMP(32, gpr.R(a), gpr.R(inst.RB)); CMP(32, gpr.R(a), gpr.R(inst.RB));

4
Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
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@ -102,8 +102,8 @@ void Jit64::mtmsr(UGeckoInstruction inst)
} }
MOV(32, M(&MSR), gpr.R(inst.RS)); MOV(32, M(&MSR), gpr.R(inst.RS));
gpr.UnlockAll(); gpr.UnlockAll();
gpr.Flush(FLUSH_ALL); gpr.Flush();
fpr.Flush(FLUSH_ALL); fpr.Flush();
// If some exceptions are pending and EE are now enabled, force checking // If some exceptions are pending and EE are now enabled, force checking
// external exceptions when going out of mtmsr in order to execute delayed // external exceptions when going out of mtmsr in order to execute delayed