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Interpreter: support non-IEEE mode emulation

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v2: fix fxsave on visual studio, thx @ rodolfo for this patch
This commit is contained in:
Tillmann Karras
2013-10-24 13:52:22 +02:00
parent 710a0ff435
commit 466a7afde3
6 changed files with 53 additions and 19 deletions
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32
Source/Core/Common/Src/x64FPURoundMode.cpp
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@ -4,6 +4,7 @@
#include "Common.h"
#include "FPURoundMode.h"
#include "CPUDetect.h"
#ifndef _WIN32
static const unsigned short FPU_ROUND_NEAR = 0 << 10;
@ -14,8 +15,11 @@ static const unsigned short FPU_ROUND_MASK = 3 << 10;
#include <xmmintrin.h>
#endif
const u32 MASKS = 0x1F80; // mask away the interrupts.
// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
const u32 EXCEPTION_MASK = 0x1F80;
// Denormals-Are-Zero (non-IEEE mode: denormal inputs are set to +/- 0)
const u32 DAZ = 0x40;
// Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0)
const u32 FTZ = 0x8000;
namespace FPURoundMode
@ -79,16 +83,28 @@ namespace FPURoundMode
//but still - set any useful sse options here
#endif
}
void SetSIMDMode(u32 mode)
void SetSIMDMode(u32 roundingMode, u32 nonIEEEMode)
{
static const u32 ssetable[4] =
// lookup table for FPSCR.RN-to-MXCSR.RC translation
static const u32 roundingModeLUT[4] =
{
(0 << 13) | MASKS,
(3 << 13) | MASKS,
(2 << 13) | MASKS,
(1 << 13) | MASKS,
(0 << 13) | EXCEPTION_MASK, // nearest
(3 << 13) | EXCEPTION_MASK, // -inf
(2 << 13) | EXCEPTION_MASK, // +inf
(1 << 13) | EXCEPTION_MASK, // zero
};
u32 csr = ssetable[mode];
u32 csr = roundingModeLUT[roundingMode];
static const u32 denormalLUT[2] =
{
FTZ, // flush-to-zero only
FTZ | DAZ, // flush-to-zero and denormals-are-zero (may not be supported)
};
if (nonIEEEMode)
{
csr |= denormalLUT[cpu_info.bDAZ];
}
_mm_setcsr(csr);
}