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BPMemory: Convert a number of unions to BitFields
This commit is contained in:
parent
0a9574eaa1
commit
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@ -769,7 +769,7 @@ void Tev::Draw()
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// - scaling of the "k" coefficient isn't clear either.
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// - scaling of the "k" coefficient isn't clear either.
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// First, calculate the offset from the viewport center (normalized to 0..1)
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// First, calculate the offset from the viewport center (normalized to 0..1)
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float offset = (Position[0] - (static_cast<s32>(bpmem.fogRange.Base.Center) - 342)) /
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float offset = (Position[0] - (static_cast<s32>(bpmem.fogRange.Base.Center.Value()) - 342)) /
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static_cast<float>(xfmem.viewport.wd);
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static_cast<float>(xfmem.viewport.wd);
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// Based on that, choose the index such that points which are far away from the z-axis use the
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// Based on that, choose the index such that points which are far away from the z-axis use the
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@ -24,8 +24,7 @@ float FogParam0::GetA() const
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float FogParam3::GetC() const
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float FogParam3::GetC() const
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{
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{
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// scale mantissa from 11 to 23 bits
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// scale mantissa from 11 to 23 bits
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const u32 integral = (static_cast<u32>(c_sign) << 31) | (static_cast<u32>(c_exp) << 23) |
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const u32 integral = (c_sign.Value() << 31) | (c_exp.Value() << 23) | (c_mant.Value() << 12);
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(static_cast<u32>(c_mant) << 12);
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float real;
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float real;
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std::memcpy(&real, &integral, sizeof(u32));
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std::memcpy(&real, &integral, sizeof(u32));
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@ -301,40 +301,37 @@ struct TevStageCombiner
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{
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{
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union ColorCombiner
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union ColorCombiner
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{
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{
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struct // abc=8bit,d=10bit
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// abc=8bit,d=10bit
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{
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BitField<0, 4, u32> d; // TEVSELCC_X
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u32 d : 4; // TEVSELCC_X
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BitField<4, 4, u32> c; // TEVSELCC_X
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u32 c : 4; // TEVSELCC_X
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BitField<8, 4, u32> b; // TEVSELCC_X
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u32 b : 4; // TEVSELCC_X
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BitField<12, 4, u32> a; // TEVSELCC_X
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u32 a : 4; // TEVSELCC_X
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u32 bias : 2;
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BitField<16, 2, u32> bias;
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u32 op : 1;
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BitField<18, 1, u32> op;
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u32 clamp : 1;
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BitField<19, 1, u32> clamp;
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BitField<20, 2, u32> shift;
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BitField<22, 2, u32> dest; // 1,2,3
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u32 shift : 2;
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u32 dest : 2; // 1,2,3
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};
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u32 hex;
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u32 hex;
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};
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};
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union AlphaCombiner
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union AlphaCombiner
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{
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{
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struct
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BitField<0, 2, u32> rswap;
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{
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BitField<2, 2, u32> tswap;
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u32 rswap : 2;
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BitField<4, 3, u32> d; // TEVSELCA_
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u32 tswap : 2;
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BitField<7, 3, u32> c; // TEVSELCA_
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u32 d : 3; // TEVSELCA_
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BitField<10, 3, u32> b; // TEVSELCA_
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u32 c : 3; // TEVSELCA_
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BitField<13, 3, u32> a; // TEVSELCA_
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u32 b : 3; // TEVSELCA_
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u32 a : 3; // TEVSELCA_
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u32 bias : 2; // GXTevBias
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BitField<16, 2, u32> bias; // GXTevBias
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u32 op : 1;
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BitField<18, 1, u32> op;
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u32 clamp : 1;
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BitField<19, 1, u32> clamp;
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BitField<20, 2, u32> shift;
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BitField<22, 2, u32> dest; // 1,2,3
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u32 shift : 2;
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u32 dest : 2; // 1,2,3
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};
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u32 hex;
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u32 hex;
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};
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};
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@ -353,21 +350,18 @@ struct TevStageCombiner
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union TevStageIndirect
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union TevStageIndirect
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{
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{
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struct
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BitField<0, 2, u32> bt; // Indirect tex stage ID
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{
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BitField<2, 2, u32> fmt; // Format: ITF_X
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u32 bt : 2; // Indirect tex stage ID
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BitField<4, 3, u32> bias; // ITB_X
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u32 fmt : 2; // Format: ITF_X
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BitField<7, 2, u32> bs; // ITBA_X, indicates which coordinate will become the 'bump alpha'
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u32 bias : 3; // ITB_X
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BitField<9, 4, u32> mid; // Matrix ID to multiply offsets with
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u32 bs : 2; // ITBA_X, indicates which coordinate will become the 'bump alpha'
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BitField<13, 3, u32> sw; // ITW_X, wrapping factor for S of regular coord
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u32 mid : 4; // Matrix ID to multiply offsets with
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BitField<16, 3, u32> tw; // ITW_X, wrapping factor for T of regular coord
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u32 sw : 3; // ITW_X, wrapping factor for S of regular coord
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BitField<19, 1, u32> lb_utclod; // Use modified or unmodified texture
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u32 tw : 3; // ITW_X, wrapping factor for T of regular coord
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// coordinates for LOD computation
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u32 lb_utclod : 1; // Use modified or unmodified texture coordinates for LOD computation
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BitField<20, 1, u32> fb_addprev; // 1 if the texture coordinate results from the previous TEV
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u32 fb_addprev : 1; // 1 if the texture coordinate results from the previous TEV stage should
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// stage should be added
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// be added
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u32 pad0 : 3;
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u32 rid : 8;
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};
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struct
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struct
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{
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{
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u32 hex : 21;
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u32 hex : 21;
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@ -381,28 +375,23 @@ union TevStageIndirect
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union TwoTevStageOrders
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union TwoTevStageOrders
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{
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{
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struct
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BitField<0, 3, u32> texmap0; // Indirect tex stage texmap
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{
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BitField<3, 3, u32> texcoord0;
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u32 texmap0 : 3; // Indirect tex stage texmap
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BitField<6, 1, u32> enable0; // 1 if should read from texture
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u32 texcoord0 : 3;
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BitField<7, 3, u32> colorchan0; // RAS1_CC_X
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u32 enable0 : 1; // 1 if should read from texture
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u32 colorchan0 : 3; // RAS1_CC_X
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u32 pad0 : 2;
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BitField<12, 3, u32> texmap1;
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BitField<15, 3, u32> texcoord1;
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BitField<18, 1, u32> enable1; // 1 if should read from texture
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BitField<19, 3, u32> colorchan1; // RAS1_CC_X
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u32 texmap1 : 3;
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BitField<24, 8, u32> rid;
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u32 texcoord1 : 3;
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u32 enable1 : 1; // 1 if should read from texture
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u32 colorchan1 : 3; // RAS1_CC_X
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u32 pad1 : 2;
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u32 rid : 8;
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};
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u32 hex;
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u32 hex;
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int getTexMap(int i) const { return i ? texmap1 : texmap0; }
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u32 getTexMap(int i) const { return i ? texmap1.Value() : texmap0.Value(); }
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int getTexCoord(int i) const { return i ? texcoord1 : texcoord0; }
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u32 getTexCoord(int i) const { return i ? texcoord1.Value() : texcoord0.Value(); }
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int getEnable(int i) const { return i ? enable1 : enable0; }
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u32 getEnable(int i) const { return i ? enable1.Value() : enable0.Value(); }
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int getColorChan(int i) const { return i ? colorchan1 : colorchan0; }
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u32 getColorChan(int i) const { return i ? colorchan1.Value() : colorchan0.Value(); }
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};
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};
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union TEXSCALE
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union TEXSCALE
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@ -527,20 +516,14 @@ union TexTLUT
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union ZTex1
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union ZTex1
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{
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{
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struct
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BitField<0, 24, u32> bias;
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{
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u32 bias : 24;
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};
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u32 hex;
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u32 hex;
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};
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};
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union ZTex2
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union ZTex2
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{
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{
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struct
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BitField<0, 2, u32> type; // TEV_Z_TYPE_X
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{
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BitField<2, 2, u32> op; // GXZTexOp
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u32 type : 2; // TEV_Z_TYPE_X
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u32 op : 2; // GXZTexOp
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};
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u32 hex;
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u32 hex;
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};
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};
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@ -681,14 +664,12 @@ union FogParam0
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union FogParam3
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union FogParam3
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{
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{
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struct
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BitField<0, 11, u32> c_mant;
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{
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BitField<11, 8, u32> c_exp;
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u32 c_mant : 11;
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BitField<19, 1, u32> c_sign;
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u32 c_exp : 8;
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BitField<20, 1, u32> proj; // 0 - perspective, 1 - orthographic
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u32 c_sign : 1;
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BitField<21, 3, u32> fsel; // 0 - off, 2 - linear, 4 - exp, 5 - exp2, 6 -
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u32 proj : 1; // 0 - perspective, 1 - orthographic
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// backward exp, 7 - backward exp2
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u32 fsel : 3; // 0 - off, 2 - linear, 4 - exp, 5 - exp2, 6 - backward exp, 7 - backward exp2
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};
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// amount to subtract from eyespacez after range adjustment
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// amount to subtract from eyespacez after range adjustment
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float GetC() const;
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float GetC() const;
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@ -698,15 +679,12 @@ union FogParam3
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union FogRangeKElement
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union FogRangeKElement
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{
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{
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struct
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BitField<0, 12, u32> HI;
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{
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BitField<12, 12, u32> LO;
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u32 HI : 12;
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BitField<24, 8, u32> regid;
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u32 LO : 12;
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u32 regid : 8;
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};
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// TODO: Which scaling coefficient should we use here? This is just a guess!
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// TODO: Which scaling coefficient should we use here? This is just a guess!
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float GetValue(int i) const { return (i ? HI : LO) / 256.f; }
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float GetValue(int i) const { return (i ? HI.Value() : LO.Value()) / 256.f; }
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u32 HEX;
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u32 HEX;
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};
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};
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@ -714,13 +692,9 @@ struct FogRangeParams
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{
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{
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union RangeBase
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union RangeBase
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{
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{
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struct
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BitField<0, 10, u32> Center; // viewport center + 342
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{
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BitField<10, 1, u32> Enabled;
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u32 Center : 10; // viewport center + 342
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BitField<24, 8, u32> regid;
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u32 Enabled : 1;
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u32 unused : 13;
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u32 regid : 8;
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};
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u32 hex;
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u32 hex;
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};
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};
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RangeBase Base;
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RangeBase Base;
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@ -736,12 +710,9 @@ struct FogParams
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union FogColor
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union FogColor
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{
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{
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struct
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BitField<0, 8, u32> b;
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{
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BitField<8, 8, u32> g;
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u32 b : 8;
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BitField<16, 8, u32> r;
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u32 g : 8;
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u32 r : 8;
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};
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u32 hex;
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u32 hex;
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};
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};
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@ -771,11 +742,8 @@ union ZMode
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union ConstantAlpha
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union ConstantAlpha
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{
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{
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struct
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BitField<0, 8, u32> alpha;
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{
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BitField<8, 1, u32> enable;
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u32 alpha : 8;
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u32 enable : 1;
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};
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u32 hex;
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u32 hex;
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};
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};
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@ -881,19 +849,16 @@ union TevReg
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union TevKSel
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union TevKSel
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{
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{
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struct
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BitField<0, 2, u32> swap1;
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{
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BitField<2, 2, u32> swap2;
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u32 swap1 : 2;
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BitField<4, 5, u32> kcsel0;
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u32 swap2 : 2;
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BitField<9, 5, u32> kasel0;
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u32 kcsel0 : 5;
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BitField<14, 5, u32> kcsel1;
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u32 kasel0 : 5;
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BitField<19, 5, u32> kasel1;
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u32 kcsel1 : 5;
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u32 kasel1 : 5;
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};
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u32 hex;
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u32 hex;
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int getKC(int i) const { return i ? kcsel1 : kcsel0; }
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u32 getKC(int i) const { return i ? kcsel1.Value() : kcsel0.Value(); }
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int getKA(int i) const { return i ? kasel1 : kasel0; }
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u32 getKA(int i) const { return i ? kasel1.Value() : kasel0.Value(); }
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};
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};
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union AlphaTest
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union AlphaTest
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@ -158,7 +158,8 @@ static void BPWritten(const BPCmd& bp)
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}
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}
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return;
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return;
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha, bpmem.dstalpha.enable);
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha.Value(),
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bpmem.dstalpha.enable.Value());
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if (bp.changes & 0xFF)
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if (bp.changes & 0xFF)
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PixelShaderManager::SetDestAlpha();
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PixelShaderManager::SetDestAlpha();
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if (bp.changes & 0x100)
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if (bp.changes & 0x100)
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@ -322,7 +323,7 @@ static void BPWritten(const BPCmd& bp)
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}
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}
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return;
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return;
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case BPMEM_BIAS: // BIAS
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case BPMEM_BIAS: // BIAS
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PRIM_LOG("ztex bias=0x%x", bpmem.ztex1.bias);
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PRIM_LOG("ztex bias=0x%x", bpmem.ztex1.bias.Value());
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if (bp.changes)
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if (bp.changes)
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PixelShaderManager::SetZTextureBias();
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PixelShaderManager::SetZTextureBias();
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return;
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return;
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@ -1281,7 +1282,7 @@ void GetBPRegInfo(const u8* data, std::string* name, std::string* desc)
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"Tex sel: %d\n",
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"Tex sel: %d\n",
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(data[0] - BPMEM_TEV_ALPHA_ENV) / 2, tevin[ac.a], tevin[ac.b], tevin[ac.c],
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(data[0] - BPMEM_TEV_ALPHA_ENV) / 2, tevin[ac.a], tevin[ac.b], tevin[ac.c],
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tevin[ac.d], tevbias[ac.bias], tevop[ac.op], no_yes[ac.clamp],
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tevin[ac.d], tevbias[ac.bias], tevop[ac.op], no_yes[ac.clamp],
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tevscale[ac.shift], tevout[ac.dest], ac.rswap, ac.tswap);
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tevscale[ac.shift], tevout[ac.dest], ac.rswap.Value(), ac.tswap.Value());
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break;
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break;
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}
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}
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@ -824,7 +824,7 @@ static void WriteStage(ShaderCode& out, const pixel_shader_uid_data* uid_data, i
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const char* tevIndAlphaSel[] = {"", "x", "y", "z"};
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const char* tevIndAlphaSel[] = {"", "x", "y", "z"};
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const char* tevIndAlphaMask[] = {"248", "224", "240",
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const char* tevIndAlphaMask[] = {"248", "224", "240",
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"248"}; // 0b11111000, 0b11100000, 0b11110000, 0b11111000
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"248"}; // 0b11111000, 0b11100000, 0b11110000, 0b11111000
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out.Write("alphabump = iindtex%d.%s & %s;\n", tevind.bt, tevIndAlphaSel[tevind.bs],
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out.Write("alphabump = iindtex%d.%s & %s;\n", tevind.bt.Value(), tevIndAlphaSel[tevind.bs],
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tevIndAlphaMask[tevind.fmt]);
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tevIndAlphaMask[tevind.fmt]);
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}
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}
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else
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else
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@ -836,7 +836,8 @@ static void WriteStage(ShaderCode& out, const pixel_shader_uid_data* uid_data, i
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{
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{
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// format
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// format
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const char* tevIndFmtMask[] = {"255", "31", "15", "7"};
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const char* tevIndFmtMask[] = {"255", "31", "15", "7"};
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out.Write("\tint3 iindtevcrd%d = iindtex%d & %s;\n", n, tevind.bt, tevIndFmtMask[tevind.fmt]);
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out.Write("\tint3 iindtevcrd%d = iindtex%d & %s;\n", n, tevind.bt.Value(),
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tevIndFmtMask[tevind.fmt]);
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// bias - TODO: Check if this needs to be this complicated..
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// bias - TODO: Check if this needs to be this complicated..
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const char* tevIndBiasField[] = {"", "x", "y", "xy",
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const char* tevIndBiasField[] = {"", "x", "y", "xy",
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@ -195,7 +195,7 @@ void VertexManagerBase::Flush()
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#if defined(_DEBUG) || defined(DEBUGFAST)
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#if defined(_DEBUG) || defined(DEBUGFAST)
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PRIM_LOG("frame%d:\n texgen=%d, numchan=%d, dualtex=%d, ztex=%d, cole=%d, alpe=%d, ze=%d",
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PRIM_LOG("frame%d:\n texgen=%d, numchan=%d, dualtex=%d, ztex=%d, cole=%d, alpe=%d, ze=%d",
|
||||||
g_ActiveConfig.iSaveTargetId, xfmem.numTexGen.numTexGens, xfmem.numChan.numColorChans,
|
g_ActiveConfig.iSaveTargetId, xfmem.numTexGen.numTexGens, xfmem.numChan.numColorChans,
|
||||||
xfmem.dualTexTrans.enabled, bpmem.ztex2.op, (int)bpmem.blendmode.colorupdate,
|
xfmem.dualTexTrans.enabled, (int)bpmem.ztex2.op, (int)bpmem.blendmode.colorupdate,
|
||||||
(int)bpmem.blendmode.alphaupdate, (int)bpmem.zmode.updateenable);
|
(int)bpmem.blendmode.alphaupdate, (int)bpmem.zmode.updateenable);
|
||||||
|
|
||||||
for (unsigned int i = 0; i < xfmem.numChan.numColorChans; ++i)
|
for (unsigned int i = 0; i < xfmem.numChan.numColorChans; ++i)
|
||||||
|
Loading…
Reference in New Issue
Block a user