DSP: Restore CMPI and its disasm. Attempt a correct implementation but results seem worse, dunno :p (playing around with Hermes' DSP demos). Fix error logging to log pc-1 instead of pc since pc has already been incremented. minor cleanups.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2881 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard
2009-04-05 16:58:15 +00:00
parent 4832ffa377
commit 4913912dbb
5 changed files with 51 additions and 38 deletions

View File

@ -32,8 +32,7 @@ namespace DSPInterpreter {
void unknown(const UDSPInstruction& opc)
{
//_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
ERROR_LOG(DSPHLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc);
/*PanicAlert("LLE: Unrecognized opcode 0x%04x", opc.hex);*/
ERROR_LOG(DSPHLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc - 1);
//g_dsp.pc = g_dsp.err_pc;
}
@ -602,7 +601,7 @@ void andf(const UDSPInstruction& opc)
}
// FIXME inside
void subf(const UDSPInstruction& opc)
void cmpi(const UDSPInstruction& opc)
{
if (opc.hex & 0xf)
{
@ -610,6 +609,8 @@ void subf(const UDSPInstruction& opc)
ERROR_LOG(DSPHLE, "dsp subf opcode");
}
#if 1
// Old implementation
u8 reg = 0x1e + ((opc.hex >> 8) & 0x1);
s64 imm = (s16)dsp_fetch_code();
@ -617,6 +618,18 @@ void subf(const UDSPInstruction& opc)
s64 res = val - imm;
Update_SR_Register64(res);
#else
// Implementation according to docs
int reg = (opc.hex >> 8) & 0x1;
// Immediate is considered to be at M level in the 40-bit accumulator.
s64 imm = (s64)dsp_fetch_code() << 16;
s64 val = dsp_get_long_acc(reg);
s64 res = val - imm;
Update_SR_Register64(res);
#endif
}
// FIXME inside