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DSP: Restore CMPI and its disasm. Attempt a correct implementation but results seem worse, dunno :p (playing around with Hermes' DSP demos). Fix error logging to log pc-1 instead of pc since pc has already been incremented. minor cleanups.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2881 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -32,8 +32,7 @@ namespace DSPInterpreter {
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void unknown(const UDSPInstruction& opc)
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{
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//_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
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ERROR_LOG(DSPHLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc);
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/*PanicAlert("LLE: Unrecognized opcode 0x%04x", opc.hex);*/
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ERROR_LOG(DSPHLE, "LLE: Unrecognized opcode 0x%04x, pc 0x%04x", opc.hex, g_dsp.pc - 1);
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//g_dsp.pc = g_dsp.err_pc;
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}
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@ -602,7 +601,7 @@ void andf(const UDSPInstruction& opc)
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}
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// FIXME inside
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void subf(const UDSPInstruction& opc)
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void cmpi(const UDSPInstruction& opc)
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{
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if (opc.hex & 0xf)
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{
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@ -610,6 +609,8 @@ void subf(const UDSPInstruction& opc)
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ERROR_LOG(DSPHLE, "dsp subf opcode");
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}
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#if 1
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// Old implementation
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u8 reg = 0x1e + ((opc.hex >> 8) & 0x1);
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s64 imm = (s16)dsp_fetch_code();
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@ -617,6 +618,18 @@ void subf(const UDSPInstruction& opc)
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s64 res = val - imm;
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Update_SR_Register64(res);
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#else
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// Implementation according to docs
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int reg = (opc.hex >> 8) & 0x1;
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// Immediate is considered to be at M level in the 40-bit accumulator.
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s64 imm = (s64)dsp_fetch_code() << 16;
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s64 val = dsp_get_long_acc(reg);
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s64 res = val - imm;
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Update_SR_Register64(res);
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#endif
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}
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// FIXME inside
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