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DSP LLE Jit, joined work with XK and skidu.
VERY EXPERIMENTAL DON'T EXPECT HIGH PERFORMANCE!. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5288 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee
425
Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
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425
Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
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@ -0,0 +1,425 @@
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// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#include "../DSPMemoryMap.h"
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#include "../DSPEmitter.h"
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#include "../DSPIntExtOps.h" // remove when getting rid of writebacklog
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// See docs in the interpeter
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inline bool IsSameMemArea(u16 a, u16 b)
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{
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//LM: tested on WII
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if ((a>>10)==(b>>10))
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return true;
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else
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return false;
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}
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// DR $arR
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// xxxx xxxx 0000 01rr
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// Decrement addressing register $arR.
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void DSPEmitter::dr(const UDSPInstruction opc) {
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decrement_addr_reg(opc & 0x3);
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}
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// IR $arR
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// xxxx xxxx 0000 10rr
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// Increment addressing register $arR.
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void DSPEmitter::ir(const UDSPInstruction opc) {
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increment_addr_reg(opc & 0x3);
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}
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// NR $arR
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// xxxx xxxx 0000 11rr
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// Add corresponding indexing register $ixR to addressing register $arR.
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void DSPEmitter::nr(const UDSPInstruction opc) {
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u8 reg = opc & 0x3;
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increase_addr_reg(reg);
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}
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// MV $axD.D, $acS.S
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// xxxx xxxx 0001 ddss
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// Move value of $acS.S to the $axD.D.
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void DSPEmitter::mv(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x3) + DSP_REG_ACL0;
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u8 dreg = ((opc >> 2) & 0x3);
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#if 0 //more tests
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if ((sreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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writeToBackLog(0, dreg + DSP_REG_AXL0, ((u16)dsp_get_acc_h(sreg-DSP_REG_ACM0) & 0x0080) ? 0x8000 : 0x7fff);
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else
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#endif
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writeToBackLog(0, dreg + DSP_REG_AXL0, g_dsp.r[sreg]);
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}
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// S @$arD, $acS.S
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// xxxx xxxx 001s s0dd
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// Store value of $acS.S in the memory pointed by register $arD.
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// Post increment register $arD.
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void DSPEmitter::s(const UDSPInstruction opc)
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{
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u8 dreg = opc & 0x3;
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u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
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ext_dmem_write(dreg, sreg);
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increment_addr_reg(dreg);
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}
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// SN @$arD, $acS.S
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// xxxx xxxx 001s s1dd
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// Store value of register $acS.S in the memory pointed by register $arD.
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// Add indexing register $ixD to register $arD.
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void DSPEmitter::sn(const UDSPInstruction opc)
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{
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u8 dreg = opc & 0x3;
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u8 sreg = ((opc >> 3) & 0x3) + DSP_REG_ACL0;
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ext_dmem_write(dreg, sreg);
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increase_addr_reg(dreg);
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}
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// L $axD.D, @$arS
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// xxxx xxxx 01dd d0ss
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Post increment register $arS.
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void DSPEmitter::l(const UDSPInstruction opc)
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{
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u8 sreg = opc & 0x3;
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u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
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if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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{
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u16 val = ext_dmem_read(g_dsp.r[sreg]);
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writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
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writeToBackLog(1, dreg, val);
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writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
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increment_addr_reg(sreg);
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}
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else
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{
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[sreg]));
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increment_addr_reg(sreg);
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}
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}
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// LN $axD.D, @$arS
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// xxxx xxxx 01dd d0ss
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// Load $axD.D/$acD.D with value from memory pointed by register $arS.
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// Add indexing register register $ixS to register $arS.
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void DSPEmitter::ln(const UDSPInstruction opc)
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{
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u8 sreg = opc & 0x3;
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u8 dreg = ((opc >> 3) & 0x7) + DSP_REG_AXL0;
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if ((dreg >= DSP_REG_ACM0) && (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT))
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{
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u16 val = ext_dmem_read(g_dsp.r[sreg]);
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writeToBackLog(0, dreg - DSP_REG_ACM0 + DSP_REG_ACH0, (val & 0x8000) ? 0xFFFF : 0x0000);
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writeToBackLog(1, dreg, val);
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writeToBackLog(2, dreg - DSP_REG_ACM0 + DSP_REG_ACL0, 0);
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increase_addr_reg(sreg);
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}
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else
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{
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[sreg]));
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increase_addr_reg(sreg);
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}
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}
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// LS $axD.D, $acS.m
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// xxxx xxxx 10dd 000s
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Increment both $ar0 and $ar3.
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void DSPEmitter::ls(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR3, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
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increment_addr_reg(DSP_REG_AR3);
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increment_addr_reg(DSP_REG_AR0);
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}
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// LSN $axD.D, $acS.m
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// xxxx xxxx 10dd 010s
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and increment $ar3.
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void DSPEmitter::lsn(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR3, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
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increment_addr_reg(DSP_REG_AR3);
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increase_addr_reg(DSP_REG_AR0);
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}
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// LSM $axD.D, $acS.m
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// xxxx xxxx 10dd 100s
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix3 to addressing
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// register $ar3 and increment $ar0.
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void DSPEmitter::lsm(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR3, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
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increase_addr_reg(DSP_REG_AR3);
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increment_addr_reg(DSP_REG_AR0);
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}
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// LSMN $axD.D, $acS.m
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// xxxx xxxx 10dd 110s
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// Load register $axD.D with value from memory pointed by register
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// $ar0. Store value from register $acS.m to memory location pointed by
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// register $ar3. Add corresponding indexing register $ix0 to addressing
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// register $ar0 and add corresponding indexing register $ix3 to addressing
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// register $ar3.
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void DSPEmitter::lsnm(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR3, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR0]));
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increase_addr_reg(DSP_REG_AR3);
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increase_addr_reg(DSP_REG_AR0);
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}
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// SL $acS.m, $axD.D
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// xxxx xxxx 10dd 001s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Increment both $ar0 and $ar3.
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void DSPEmitter::sl(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR0, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
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increment_addr_reg(DSP_REG_AR3);
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increment_addr_reg(DSP_REG_AR0);
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}
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// SLN $acS.m, $axD.D
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// xxxx xxxx 10dd 011s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and increment $ar3.
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void DSPEmitter::sln(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR0, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
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increment_addr_reg(DSP_REG_AR3);
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increase_addr_reg(DSP_REG_AR0);
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}
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// SLM $acS.m, $axD.D
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// xxxx xxxx 10dd 101s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix3 to addressing register $ar3
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// and increment $ar0.
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void DSPEmitter::slm(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR0, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
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increase_addr_reg(DSP_REG_AR3);
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increment_addr_reg(DSP_REG_AR0);
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}
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// SLMN $acS.m, $axD.D
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// xxxx xxxx 10dd 111s
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// Store value from register $acS.m to memory location pointed by register
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// $ar0. Load register $axD.D with value from memory pointed by register
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// $ar3. Add corresponding indexing register $ix0 to addressing register $ar0
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// and add corresponding indexing register $ix3 to addressing register $ar3.
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void DSPEmitter::slnm(const UDSPInstruction opc)
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{
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u8 sreg = (opc & 0x1) + DSP_REG_ACM0;
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u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
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ext_dmem_write(DSP_REG_AR0, sreg);
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writeToBackLog(0, dreg, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
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increase_addr_reg(DSP_REG_AR3);
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increase_addr_reg(DSP_REG_AR0);
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}
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// LD $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 00ss
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// example for "nx'ld $AX0.L, $AX1.L, @$AR3"
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// Loads the word pointed by AR0 to AX0.H, then loads the word pointed by AR3
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// to AX0.L. Increments AR0 and AR3. If AR0 and AR3 point into the same
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// memory page (upper 6 bits of addr are the same -> games are not doing that!)
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// then the value pointed by AR0 is loaded to BOTH AX0.H and AX0.L. If AR0
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// points into an invalid memory page (ie 0x2000), then AX0.H keeps its old
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// value. (not implemented yet) If AR3 points into an invalid memory page, then
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// AX0.L gets the same value as AX0.H. (not implemented yet)
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void DSPEmitter::ld(const UDSPInstruction opc)
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{
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u8 dreg = (opc >> 5) & 0x1;
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u8 rreg = (opc >> 4) & 0x1;
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u8 sreg = opc & 0x3;
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if (sreg != DSP_REG_AR3) {
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writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
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if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3]))
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writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[sreg]));
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else
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writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
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increment_addr_reg(sreg);
|
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} else {
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||||
writeToBackLog(0, rreg + DSP_REG_AXH0, ext_dmem_read(g_dsp.r[dreg]));
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if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3]))
|
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writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
else
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increment_addr_reg(dreg);
|
||||
}
|
||||
|
||||
increment_addr_reg(DSP_REG_AR3);
|
||||
}
|
||||
|
||||
// LDN $ax0.d, $ax1.r, @$arS
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// xxxx xxxx 11dr 01ss
|
||||
void DSPEmitter::ldn(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc >> 5) & 0x1;
|
||||
u8 rreg = (opc >> 4) & 0x1;
|
||||
u8 sreg = opc & 0x3;
|
||||
|
||||
if (sreg != DSP_REG_AR3) {
|
||||
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[sreg]));
|
||||
else
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increase_addr_reg(sreg);
|
||||
} else {
|
||||
writeToBackLog(0, rreg + DSP_REG_AXH0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
else
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increase_addr_reg(dreg);
|
||||
}
|
||||
|
||||
increment_addr_reg(DSP_REG_AR3);
|
||||
}
|
||||
|
||||
// LDM $ax0.d, $ax1.r, @$arS
|
||||
// xxxx xxxx 11dr 10ss
|
||||
void DSPEmitter::ldm(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc >> 5) & 0x1;
|
||||
u8 rreg = (opc >> 4) & 0x1;
|
||||
u8 sreg = opc & 0x3;
|
||||
|
||||
if (sreg != DSP_REG_AR3) {
|
||||
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[sreg]));
|
||||
else
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increment_addr_reg(sreg);
|
||||
} else {
|
||||
writeToBackLog(0, rreg + DSP_REG_AXH0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
else
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increment_addr_reg(dreg);
|
||||
}
|
||||
|
||||
increase_addr_reg(DSP_REG_AR3);
|
||||
}
|
||||
|
||||
// LDNM $ax0.d, $ax1.r, @$arS
|
||||
// xxxx xxxx 11dr 11ss
|
||||
void DSPEmitter::ldnm(const UDSPInstruction opc)
|
||||
{
|
||||
u8 dreg = (opc >> 5) & 0x1;
|
||||
u8 rreg = (opc >> 4) & 0x1;
|
||||
u8 sreg = opc & 0x3;
|
||||
|
||||
if (sreg != DSP_REG_AR3) {
|
||||
writeToBackLog(0, (dreg << 1) + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[sreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[sreg]));
|
||||
else
|
||||
writeToBackLog(1, (rreg << 1) + DSP_REG_AXL1, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increase_addr_reg(sreg);
|
||||
} else {
|
||||
writeToBackLog(0, rreg + DSP_REG_AXH0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
|
||||
if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3]))
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[dreg]));
|
||||
else
|
||||
writeToBackLog(1, rreg + DSP_REG_AXL0, ext_dmem_read(g_dsp.r[DSP_REG_AR3]));
|
||||
|
||||
increase_addr_reg(dreg);
|
||||
}
|
||||
|
||||
increase_addr_reg(DSP_REG_AR3);
|
||||
}
|
||||
|
||||
|
||||
void DSPEmitter::writeAxAcc(const UDSPInstruction opc) {
|
||||
|
||||
}
|
||||
|
||||
|
||||
213
Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
Normal file
213
Source/Core/DSPCore/Src/Jit/DSPJitUtil.cpp
Normal file
@ -0,0 +1,213 @@
|
||||
// Copyright (C) 2010 Dolphin Project.
|
||||
|
||||
// This program is free software: you can redistribute it and/or modify
|
||||
// it under the terms of the GNU General Public License as published by
|
||||
// the Free Software Foundation, version 2.0.
|
||||
|
||||
// This program is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
// GNU General Public License 2.0 for more details.
|
||||
|
||||
// A copy of the GPL 2.0 should have been included with the program.
|
||||
// If not, see http://www.gnu.org/licenses/
|
||||
|
||||
// Official SVN repository and contact information can be found at
|
||||
// http://code.google.com/p/dolphin-emu/
|
||||
|
||||
#ifndef _DSP_JIT_UTIL_H
|
||||
#define _DSP_JIT_UTIL_H
|
||||
|
||||
#include "../DSPMemoryMap.h"
|
||||
#include "../DSPEmitter.h"
|
||||
#include "x64Emitter.h"
|
||||
#include "ABI.h"
|
||||
|
||||
using namespace Gen;
|
||||
|
||||
// HORRIBLE UGLINESS, someone please fix.
|
||||
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
||||
void DSPEmitter::increment_addr_reg(int reg)
|
||||
{
|
||||
ABI_PushAllCalleeSavedRegsAndAdjustStack();
|
||||
|
||||
// u16 tmb = g_dsp.r[DSP_REG_WR0 + reg];
|
||||
MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
||||
|
||||
// tmb = tmb | (tmb >> 8);
|
||||
MOV(16, R(EBX), R(EAX));
|
||||
SHR(16, R(EBX), Imm8(8));
|
||||
OR(16, R(EAX), R(EBX));
|
||||
|
||||
// tmb = tmb | (tmb >> 4);
|
||||
MOV(16, R(EBX), R(EAX));
|
||||
SHR(16, R(EBX), Imm8(4));
|
||||
OR(16, R(EAX), R(EBX));
|
||||
|
||||
// tmb = tmb | (tmb >> 2);
|
||||
MOV(16, R(EBX), R(EAX));
|
||||
SHR(16, R(EBX), Imm8(2));
|
||||
OR(16, R(EAX), R(EBX));
|
||||
|
||||
// tmb = tmb | (tmb >> 1);
|
||||
MOV(16, R(EBX), R(EAX));
|
||||
SHR(16, R(EBX), Imm8(1));
|
||||
OR(16, R(EAX), R(EBX));
|
||||
|
||||
// s16 tmp = g_dsp.r[reg];
|
||||
MOV(16, R(EBX), M(&g_dsp.r[reg]));
|
||||
|
||||
// if ((tmp & tmb) == tmb)
|
||||
AND(16, R(EAX), R(EBX));
|
||||
CMP(16, R(EAX), R(EBX));
|
||||
FixupBranch not_equal = J_CC(CC_NZ);
|
||||
|
||||
// tmp ^= g_dsp.r[DSP_REG_WR0 + reg];
|
||||
XOR(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
||||
|
||||
FixupBranch end = J();
|
||||
SetJumpTarget(not_equal);
|
||||
// tmp++;
|
||||
ADD(16, R(EBX), Imm8(1));
|
||||
|
||||
SetJumpTarget(end);
|
||||
|
||||
// g_dsp.r[reg] = tmp;
|
||||
MOV(16, M(&g_dsp.r[reg]), R(EBX));
|
||||
|
||||
ABI_PopAllCalleeSavedRegsAndAdjustStack();
|
||||
|
||||
}
|
||||
|
||||
// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
|
||||
void DSPEmitter::decrement_addr_reg(int reg)
|
||||
{
|
||||
ABI_PushAllCalleeSavedRegsAndAdjustStack();
|
||||
|
||||
// s16 tmp = g_dsp.r[reg];
|
||||
MOV(16, R(EAX), M(&g_dsp.r[reg]));
|
||||
|
||||
// if ((tmp & g_dsp.r[DSP_REG_WR0 + reg]) == 0)
|
||||
MOV(16, R(EBX), R(EAX));
|
||||
AND(16, R(EBX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
||||
CMP(16, R(EBX), Imm8(0));
|
||||
FixupBranch not_equal = J_CC(CC_NZ);
|
||||
|
||||
// tmp |= g_dsp.r[DSP_REG_WR0 + reg];
|
||||
OR(16, R(EAX), M(&g_dsp.r[DSP_REG_WR0 + reg]));
|
||||
|
||||
FixupBranch end = J();
|
||||
SetJumpTarget(not_equal);
|
||||
// tmp--;
|
||||
SUB(16, R(EAX), Imm8(1));
|
||||
|
||||
SetJumpTarget(end);
|
||||
|
||||
// g_dsp.r[reg] = tmp;
|
||||
MOV(16, M(&g_dsp.r[reg]), R(EAX));
|
||||
|
||||
ABI_PopAllCalleeSavedRegsAndAdjustStack();
|
||||
}
|
||||
|
||||
// Increase addr register according to the correspond ix register
|
||||
void DSPEmitter::increase_addr_reg(int reg)
|
||||
{
|
||||
|
||||
/*
|
||||
MOV(16, R(EAX), M(&g_dsp.r[DSP_REG_IX0 + reg]));
|
||||
|
||||
CMP(16, R(EAX), Imm16(0));
|
||||
FixupBranch end = J_CC(CC_Z);
|
||||
FixupBranch negValue = J_CC(CC_L);
|
||||
|
||||
ABI_CallFunctionC((void *)increment_addr_reg, reg);
|
||||
|
||||
FixupBranch posValue = J();
|
||||
|
||||
SetJumpTarget(negValue);
|
||||
ABI_CallFunctionC((void *)decrement_addr_reg, reg);
|
||||
|
||||
SetJumpTarget(posValue);
|
||||
SetJumpTarget(end);
|
||||
*/
|
||||
|
||||
// TODO: DO RIGHT!
|
||||
s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
|
||||
|
||||
if (value > 0) {
|
||||
for (int i = 0; i < value; i++) {
|
||||
increment_addr_reg(reg);
|
||||
}
|
||||
} else if (value < 0) {
|
||||
for (int i = 0; i < (int)(-value); i++) {
|
||||
decrement_addr_reg(reg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Decrease addr register according to the correspond ix register
|
||||
void DSPEmitter::decrease_addr_reg(int reg)
|
||||
{
|
||||
// TODO: DO RIGHT!
|
||||
|
||||
s16 value = (s16)g_dsp.r[DSP_REG_IX0 + reg];
|
||||
|
||||
if (value > 0) {
|
||||
for (int i = 0; i < value; i++) {
|
||||
decrement_addr_reg(reg);
|
||||
}
|
||||
} else if (value < 0) {
|
||||
for (int i = 0; i < (int)(-value); i++) {
|
||||
increment_addr_reg(reg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void DSPEmitter::ext_dmem_write(u32 dest, u32 src)
|
||||
{
|
||||
|
||||
u16 addr = g_dsp.r[dest];
|
||||
u16 val = g_dsp.r[src];
|
||||
switch (addr >> 12) {
|
||||
case 0x0: // 0xxx DRAM
|
||||
g_dsp.dram[addr & DSP_DRAM_MASK] = val;
|
||||
break;
|
||||
|
||||
case 0x1: // 1xxx COEF
|
||||
ERROR_LOG(DSPLLE, "Illegal write to COEF (pc = %02x)", g_dsp.pc);
|
||||
break;
|
||||
|
||||
case 0xf: // Fxxx HW regs
|
||||
// Can ext write to ifx?
|
||||
// gdsp_ifx_write(addr, val);
|
||||
ERROR_LOG(DSPLLE, "Illegal write to ifx (pc = %02x)", g_dsp.pc);
|
||||
break;
|
||||
|
||||
default: // Unmapped/non-existing memory
|
||||
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Write to UNKNOWN (%04x) memory", g_dsp.pc, addr);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
u16 DSPEmitter::ext_dmem_read(u16 addr)
|
||||
{
|
||||
switch (addr >> 12) {
|
||||
case 0x0: // 0xxx DRAM
|
||||
return g_dsp.dram[addr & DSP_DRAM_MASK];
|
||||
|
||||
case 0x1: // 1xxx COEF
|
||||
NOTICE_LOG(DSPLLE, "%04x : Coef Read @ %04x", g_dsp.pc, addr);
|
||||
return g_dsp.coef[addr & DSP_COEF_MASK];
|
||||
|
||||
case 0xf: // Fxxx HW regs
|
||||
// Can ext read from ifx?
|
||||
ERROR_LOG(DSPLLE, "Illegal read from ifx (pc = %02x)", g_dsp.pc);
|
||||
// return gdsp_ifx_read(addr);
|
||||
|
||||
default: // Unmapped/non-existing memory
|
||||
ERROR_LOG(DSPLLE, "%04x DSP ERROR: Read from UNKNOWN (%04x) memory", g_dsp.pc, addr);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user