From 4b37fdfa45811bceac9681ea6e0082507cbbeaa6 Mon Sep 17 00:00:00 2001 From: skidau Date: Mon, 8 Sep 2014 00:40:43 +1000 Subject: [PATCH] Added a CompileExceptionCheck function to the JitInterface and re-routed the existing code to utilise the interface. --- Source/Core/Core/HW/DSP.cpp | 15 +++------ Source/Core/Core/HW/GPFifo.cpp | 15 ++------- Source/Core/Core/PowerPC/JitInterface.cpp | 38 ++++++++++++++++++++++- Source/Core/Core/PowerPC/JitInterface.h | 10 +++++- Source/Core/Core/PowerPC/PPCAnalyst.cpp | 2 +- 5 files changed, 53 insertions(+), 27 deletions(-) diff --git a/Source/Core/Core/HW/DSP.cpp b/Source/Core/Core/HW/DSP.cpp index 30051c7fc8..c8413658e4 100644 --- a/Source/Core/Core/HW/DSP.cpp +++ b/Source/Core/Core/HW/DSP.cpp @@ -37,8 +37,8 @@ #include "Core/HW/Memmap.h" #include "Core/HW/MMIO.h" #include "Core/HW/ProcessorInterface.h" +#include "Core/PowerPC/JitInterface.h" #include "Core/PowerPC/PowerPC.h" -#include "Core/PowerPC/JitCommon/JitBase.h" namespace DSP { @@ -443,18 +443,11 @@ static void UpdateInterrupts() ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_DSP, ints_set); - if ((g_dspState.DSPControl.Hex >> 1) & g_dspState.DSPControl.Hex & (INT_DSP | INT_ARAM | INT_AID)) + if ((g_dspState.DSPControl.Hex >> 1) & g_dspState.DSPControl.Hex & INT_ARAM) { - if (jit && PC != 0 && (jit->js.dspARAMAddresses.find(PC)) == (jit->js.dspARAMAddresses.end()) && (g_dspState.DSPControl.ARAM & g_dspState.DSPControl.ARAM_mask)) + if (g_dspState.DSPControl.ARAM & g_dspState.DSPControl.ARAM_mask) { - int type = GetOpInfo(Memory::ReadUnchecked_U32(PC))->type; - if (type == OPTYPE_STORE || type == OPTYPE_STOREFP || (type == OPTYPE_STOREPS)) - { - jit->js.dspARAMAddresses.insert(PC); - - // Invalidate the JIT block so that it gets recompiled with the external exception check included. - jit->GetBlockCache()->InvalidateICache(PC, 4); - } + JitInterface::CompileExceptionCheck(JitInterface::EXCEPTIONS_ARAM_DMA); } } } diff --git a/Source/Core/Core/HW/GPFifo.cpp b/Source/Core/Core/HW/GPFifo.cpp index 01f3d1e40a..033d253510 100644 --- a/Source/Core/Core/HW/GPFifo.cpp +++ b/Source/Core/Core/HW/GPFifo.cpp @@ -8,8 +8,8 @@ #include "Core/HW/GPFifo.h" #include "Core/HW/Memmap.h" #include "Core/HW/ProcessorInterface.h" +#include "Core/PowerPC/JitInterface.h" #include "Core/PowerPC/PowerPC.h" -#include "Core/PowerPC/JitCommon/JitBase.h" #include "VideoCommon/VideoBackendBase.h" @@ -86,18 +86,7 @@ void STACKALIGN CheckGatherPipe() memmove(m_gatherPipe, m_gatherPipe + cnt, m_gatherPipeCount); // Profile where the FIFO writes are occurring. - if (jit && PC != 0 && (jit->js.fifoWriteAddresses.find(PC)) == (jit->js.fifoWriteAddresses.end())) - { - // Log only stores, fp stores and ps stores, filtering out other instructions arrived via optimizeGatherPipe - int type = GetOpInfo(Memory::ReadUnchecked_U32(PC))->type; - if (type == OPTYPE_STORE || type == OPTYPE_STOREFP || type == OPTYPE_STOREPS) - { - jit->js.fifoWriteAddresses.insert(PC); - - // Invalidate the JIT block so that it gets recompiled with the external exception check included. - jit->GetBlockCache()->InvalidateICache(PC, 4); - } - } + JitInterface::CompileExceptionCheck(JitInterface::EXCEPTIONS_FIFO_WRITE); } } diff --git a/Source/Core/Core/PowerPC/JitInterface.cpp b/Source/Core/Core/PowerPC/JitInterface.cpp index 6bfd1c4009..7562789846 100644 --- a/Source/Core/Core/PowerPC/JitInterface.cpp +++ b/Source/Core/Core/PowerPC/JitInterface.cpp @@ -216,7 +216,7 @@ namespace JitInterface jit->GetBlockCache()->InvalidateICache(address, size); } - u32 Read_Opcode_JIT(u32 _Address) + u32 ReadOpcodeJIT(u32 _Address) { if (bMMU && !bFakeVMEM && (_Address & Memory::ADDR_MASK_MEM1)) { @@ -237,6 +237,42 @@ namespace JitInterface return inst; } + void CompileExceptionCheck(int type) + { + if (!jit) + return; + + std::unordered_set *exception_addresses; + + switch (type) + { + case EXCEPTIONS_FIFO_WRITE: + { + exception_addresses = &jit->js.fifoWriteAddresses; + break; + } + case EXCEPTIONS_ARAM_DMA: + { + exception_addresses = &jit->js.dspARAMAddresses; + break; + } + default: + ERROR_LOG(POWERPC, "Unknown exception check type"); + } + + if (PC != 0 && (exception_addresses->find(PC)) == (exception_addresses->end())) + { + int type = GetOpInfo(Memory::ReadUnchecked_U32(PC))->type; + if (type == OPTYPE_STORE || type == OPTYPE_STOREFP || (type == OPTYPE_STOREPS)) + { + exception_addresses->insert(PC); + + // Invalidate the JIT block so that it gets recompiled with the external exception check included. + jit->GetBlockCache()->InvalidateICache(PC, 4); + } + } + } + void Shutdown() { if (jit) diff --git a/Source/Core/Core/PowerPC/JitInterface.h b/Source/Core/Core/PowerPC/JitInterface.h index a8ed783726..92a6533c44 100644 --- a/Source/Core/Core/PowerPC/JitInterface.h +++ b/Source/Core/Core/PowerPC/JitInterface.h @@ -11,6 +11,12 @@ namespace JitInterface { + enum + { + EXCEPTIONS_FIFO_WRITE, + EXCEPTIONS_ARAM_DMA + }; + void DoState(PointerWrap &p); CPUCoreBase *InitJitCore(int core); @@ -24,7 +30,7 @@ namespace JitInterface bool HandleFault(uintptr_t access_address, SContext* ctx); // used by JIT to read instructions - u32 Read_Opcode_JIT(const u32 _Address); + u32 ReadOpcodeJIT(const u32 _Address); // Clearing CodeCache void ClearCache(); @@ -33,6 +39,8 @@ namespace JitInterface void InvalidateICache(u32 address, u32 size); + void CompileExceptionCheck(int type); + void Shutdown(); } extern bool bMMU; diff --git a/Source/Core/Core/PowerPC/PPCAnalyst.cpp b/Source/Core/Core/PowerPC/PPCAnalyst.cpp index 6cd1043c38..923e621dcd 100644 --- a/Source/Core/Core/PowerPC/PPCAnalyst.cpp +++ b/Source/Core/Core/PowerPC/PPCAnalyst.cpp @@ -654,7 +654,7 @@ u32 PPCAnalyzer::Analyze(u32 address, CodeBlock *block, CodeBuffer *buffer, u32 for (u32 i = 0; i < blockSize; ++i) { - UGeckoInstruction inst = JitInterface::Read_Opcode_JIT(address); + UGeckoInstruction inst = JitInterface::ReadOpcodeJIT(address); if (inst.hex != 0) {