From 50f7a7d2489944dbe79884c343fe11bcacdd3363 Mon Sep 17 00:00:00 2001 From: Sintendo Date: Sun, 19 Apr 2020 23:25:09 +0200 Subject: [PATCH] Jit64: addx - Prefer smaller MOV+ADD sequence ADD has a smaller encoding for immediates that can be expressed as an 8-bit signed integer (in other words, between -128 and 127). MOV lacks this compact representation. Since addition allows us to swap the source registers, we can always get the shortest sequence here by carefully checking if we're dealing with a small immediate first. If we are, move the other source into the destination and add the small immediate onto that. For large immediates the reverse is preferrable. Before: 41 BE 40 00 00 00 mov r14d,40h 44 03 75 A8 add r14d,dword ptr [rbp-58h] After: 44 8B 75 A8 mov r14d,dword ptr [rbp-58h] 41 83 C6 40 add r14d,40h Before: 44 8B 7D F8 mov r15d,dword ptr [rbp-8] 41 81 C7 00 68 00 CC add r15d,0CC006800h After: 41 BF 00 68 00 CC mov r15d,0CC006800h 44 03 7D F8 add r15d,dword ptr [rbp-8] --- Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index a34d5bf356..5eab8e7de5 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -1356,6 +1356,23 @@ void Jit64::addx(UGeckoInstruction inst) LEA(32, Rd, MDisp(Rreg.GetSimpleReg(), Rimm.SImm32())); } } + else if (Ra.IsImm() || Rb.IsImm()) + { + RCOpArg& Rimm = Ra.IsImm() ? Ra : Rb; + RCOpArg& Rother = Ra.IsImm() ? Rb : Ra; + + s32 imm = Rimm.SImm32(); + if (imm >= -128 && imm <= 127) + { + MOV(32, Rd, Rother); + ADD(32, Rd, Rimm); + } + else + { + MOV(32, Rd, Rimm); + ADD(32, Rd, Rother); + } + } else { MOV(32, Rd, Ra);