From 53a947749a459c9037b0a9c000d9935ed9b14ac3 Mon Sep 17 00:00:00 2001 From: Sintendo Date: Fri, 14 Sep 2018 21:57:00 +0200 Subject: [PATCH] x64Emitter: short MOV for 64bit immediates (2) Prior to this commit, the emitter would unconditionally emit a 10-byte instruction known as MOVABS when loading a 64-bit immediate to a register. 0: 48 b8 ef be ad de 00 movabs rax,0xdeadbeef 7: 00 00 00 With this change, it will instead rely on the fact that on x64 writes to 32-bit registers are automatically zero extended to 64-bits, allowing us to emit a 5 or 6-bytes instruction with the same effect for certain immediates. 0: b8 ef be ad de mov eax,0xdeadbeef --- Source/Core/Common/x64Emitter.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Source/Core/Common/x64Emitter.cpp b/Source/Core/Common/x64Emitter.cpp index 8e85e146b3..2a70ac7265 100644 --- a/Source/Core/Common/x64Emitter.cpp +++ b/Source/Core/Common/x64Emitter.cpp @@ -1591,6 +1591,12 @@ void XEmitter::XOR(int bits, const OpArg& a1, const OpArg& a2) } void XEmitter::MOV(int bits, const OpArg& a1, const OpArg& a2) { + if (bits == 64 && a1.IsSimpleReg() && a2.scale == SCALE_IMM64 && + a2.offset == static_cast(a2.offset)) + { + WriteNormalOp(32, NormalOp::MOV, a1, a2.AsImm32()); + return; + } if (a1.IsSimpleReg() && a2.IsSimpleReg() && a1.GetSimpleReg() == a2.GetSimpleReg()) ERROR_LOG(DYNA_REC, "Redundant MOV @ %p - bug in JIT?", code); WriteNormalOp(bits, NormalOp::MOV, a1, a2);