From 5b5e46220070130f49aacd52f59e4fa564883142 Mon Sep 17 00:00:00 2001 From: Fiora Date: Wed, 8 Oct 2014 19:41:51 -0700 Subject: [PATCH] JIT: reorder blr comparisons This should allow macro-op fusion in blr instructions. --- Source/Core/Core/PowerPC/Jit64/Jit.cpp | 4 ++-- Source/Core/Core/PowerPC/Jit64/JitAsm.cpp | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp index c9e8057847..2ee1652fa6 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp @@ -414,10 +414,10 @@ void Jit64::WriteBLRExit() bool disturbed = Cleanup(); if (disturbed) MOV(32, R(RSCRATCH), PPCSTATE(pc)); + MOV(32, R(RSCRATCH2), Imm32(js.downcountAmount)); CMP(64, R(RSCRATCH), MDisp(RSP, 8)); - MOV(32, R(RSCRATCH), Imm32(js.downcountAmount)); J_CC(CC_NE, asm_routines.dispatcherMispredictedBLR); - SUB(32, PPCSTATE(downcount), R(RSCRATCH)); + SUB(32, PPCSTATE(downcount), R(RSCRATCH2)); RET(); } diff --git a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp index b2c1b0855c..3e0a1308d3 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp +++ b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp @@ -52,14 +52,14 @@ void Jit64AsmRoutineManager::Generate() #if 0 // debug mispredicts MOV(32, R(ABI_PARAM1), MDisp(RSP, 8)); // guessed_pc - ABI_PushRegistersAndAdjustStack(1 << RSCRATCH, 0); + ABI_PushRegistersAndAdjustStack(1 << RSCRATCH2, 0); CALL(reinterpret_cast(&ReportMispredict)); - ABI_PopRegistersAndAdjustStack(1 << RSCRATCH, 0); + ABI_PopRegistersAndAdjustStack(1 << RSCRATCH2, 0); #endif ResetStack(); - SUB(32, PPCSTATE(downcount), R(RSCRATCH)); + SUB(32, PPCSTATE(downcount), R(RSCRATCH2)); dispatcher = GetCodePtr(); // The result of slice decrementation should be in flags if somebody jumped here