mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-07-22 13:49:53 -06:00
small code reorganization.
Now efb to ram display correctly but still is misaligned by one pixel please test and give me feedback git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4618 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -33,22 +33,6 @@ const bool renderFog = false;
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using namespace D3D;
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static const D3DTEXTUREFILTERTYPE d3dMipFilters[4] =
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{
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D3DTEXF_NONE,
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D3DTEXF_POINT,
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D3DTEXF_LINEAR,
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D3DTEXF_LINEAR, //reserved
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};
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static const D3DTEXTUREADDRESS d3dClamps[4] =
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{
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D3DTADDRESS_CLAMP,
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D3DTADDRESS_WRAP,
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D3DTADDRESS_MIRROR,
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D3DTADDRESS_WRAP //reserved
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};
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namespace BPFunctions
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{
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@ -69,9 +53,7 @@ void SetScissor(const BPCmd &bp)
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void SetLineWidth(const BPCmd &bp)
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{
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// We can't change line width in D3D unless we use ID3DXLine
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float psize = float(bpmem.lineptwidth.pointsize) * 6.0f;
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D3D::SetRenderState(D3DRS_POINTSIZE, *((DWORD*)&psize));
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Renderer::SetLineWidth();
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}
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void SetDepthMode(const BPCmd &bp)
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@ -85,7 +67,7 @@ void SetBlendMode(const BPCmd &bp)
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}
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void SetDitherMode(const BPCmd &bp)
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{
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D3D::SetRenderState(D3DRS_DITHERENABLE,bpmem.blendmode.dither);
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Renderer::SetDitherMode();
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}
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void SetLogicOpMode(const BPCmd &bp)
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{
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@ -102,16 +84,15 @@ void CopyEFB(const BPCmd &bp, const EFBRectangle &rc, const u32 &address, const
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if (!g_ActiveConfig.bEFBCopyDisable)
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{
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//uncomment this to see the efb to ram work in progress
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/*if (g_ActiveConfig.bCopyEFBToRAM)
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if (g_ActiveConfig.bCopyEFBToRAM)
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{
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// To RAM, not implemented yet
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//ToRam
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TextureConverter::EncodeToRam(address, fromZBuffer, isIntensityFmt, copyfmt, scaleByHalf, rc);
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}
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else // To D3D Texture*/
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else // To D3D Texture
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{
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TextureCache::CopyRenderTargetToTexture(address, fromZBuffer, isIntensityFmt, copyfmt, scaleByHalf, rc);
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}
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}
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}
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@ -135,7 +116,7 @@ void ClearScreen(const BPCmd &bp, const EFBRectangle &rc)
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void RestoreRenderState(const BPCmd &bp)
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{
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//Renderer::SetRenderMode(Renderer::RM_Normal);
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Renderer::RestoreAPIState();
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}
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bool GetConfig(const int &type)
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@ -161,40 +142,8 @@ u8 *GetPointer(const u32 &address)
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void SetSamplerState(const BPCmd &bp)
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{
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const FourTexUnits &tex = bpmem.tex[(bp.address & 0xE0) == 0xA0];
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int stage = (bp.address & 3);//(addr>>4)&2;
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const TexMode0 &tm0 = tex.texMode0[stage];
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D3DTEXTUREFILTERTYPE min, mag, mip;
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if (g_ActiveConfig.bForceFiltering)
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{
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min = mag = mip = D3DTEXF_LINEAR;
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}
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else
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{
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min = (tm0.min_filter & 4) ? D3DTEXF_LINEAR : D3DTEXF_POINT;
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mag = tm0.mag_filter ? D3DTEXF_LINEAR : D3DTEXF_POINT;
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mip = d3dMipFilters[tm0.min_filter & 3];
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}
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if ((bp.address & 0xE0) == 0xA0)
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stage += 4;
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if (mag == D3DTEXF_LINEAR && min == D3DTEXF_LINEAR &&
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g_ActiveConfig.iMaxAnisotropy > 1)
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{
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min = D3DTEXF_ANISOTROPIC;
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}
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D3D::SetSamplerState(stage, D3DSAMP_MINFILTER, min);
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D3D::SetSamplerState(stage, D3DSAMP_MAGFILTER, mag);
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D3D::SetSamplerState(stage, D3DSAMP_MIPFILTER, mip);
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D3D::SetSamplerState(stage, D3DSAMP_ADDRESSU, d3dClamps[tm0.wrap_s]);
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D3D::SetSamplerState(stage, D3DSAMP_ADDRESSV, d3dClamps[tm0.wrap_t]);
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//wip
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//dev->SetSamplerState(stage,D3DSAMP_MIPMAPLODBIAS,tm0.lod_bias/4.0f);
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//char temp[256];
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//sprintf(temp,"lod %f",tm0.lod_bias/4.0f);
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//g_VideoInitialize.pLog(temp);
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Renderer::SetSamplerState(stage,(bp.address & 0xE0) == 0xA0);
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}
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void SetInterlacingMode(const BPCmd &bp)
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