From 5e46c16e4f2906ec653a4f7b2798e2e8172f7616 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Mon, 15 Oct 2018 21:00:54 +0100
Subject: [PATCH] JitRegCache: Add IsZero to RCOpArg

---
 Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h
index 5579d03328..d767073cc8 100644
--- a/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h
+++ b/Source/Core/Core/PowerPC/Jit64/RegCache/JitRegCache.h
@@ -56,6 +56,7 @@ public:
   bool IsImm() const;
   s32 SImm32() const;
   u32 Imm32() const;
+  bool IsZero() const { return IsImm() && Imm32() == 0; }
 
 private:
   friend class RegCache;