mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-07-24 14:49:42 -06:00
Merge 'master' into shader-uids-awesome.
Conflicts: Source/Core/VideoCommon/Src/BPMemory.h Source/Core/VideoCommon/Src/LightingShaderGen.cpp Source/Core/VideoCommon/Src/PixelShaderGen.cpp Source/Core/VideoCommon/Src/PixelShaderGen.h Source/Core/VideoCommon/Src/PixelShaderManager.cpp Source/Core/VideoCommon/Src/VertexShaderGen.cpp Source/Core/VideoCommon/Src/VertexShaderGen.h
This commit is contained in:
@ -1,19 +1,6 @@
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// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#ifndef _BPMEMORY_H
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#define _BPMEMORY_H
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@ -100,17 +87,17 @@
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#define BPMEM_FOGPARAM3 0xF1
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#define BPMEM_FOGCOLOR 0xF2
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#define BPMEM_ALPHACOMPARE 0xF3
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#define BPMEM_BIAS 0xF4
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#define BPMEM_ZTEX2 0xF5
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#define BPMEM_BIAS 0xF4
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#define BPMEM_ZTEX2 0xF5
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#define BPMEM_TEV_KSEL 0xF6 // 0xF6 + 8
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#define BPMEM_BP_MASK 0xFE
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// Tev/combiner things
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#define TEVSCALE_1 0
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#define TEVSCALE_2 1
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#define TEVSCALE_4 2
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#define TEVSCALE_1 0
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#define TEVSCALE_2 1
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#define TEVSCALE_4 2
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#define TEVDIVIDE_2 3
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#define TEVCMP_R8 0
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@ -149,27 +136,27 @@
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#define TEVCOLORARG_ZERO 15
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#define TEVALPHAARG_APREV 0
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#define TEVALPHAARG_A0 1
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#define TEVALPHAARG_A1 2
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#define TEVALPHAARG_A2 3
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#define TEVALPHAARG_TEXA 4
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#define TEVALPHAARG_RASA 5
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#define TEVALPHAARG_A0 1
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#define TEVALPHAARG_A1 2
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#define TEVALPHAARG_A2 3
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#define TEVALPHAARG_TEXA 4
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#define TEVALPHAARG_RASA 5
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#define TEVALPHAARG_KONST 6
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#define TEVALPHAARG_ZERO 7
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#define TEVALPHAARG_ZERO 7
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#define GX_TEVPREV 0
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#define GX_TEVREG0 1
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#define GX_TEVREG1 2
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#define GX_TEVREG2 3
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#define GX_TEVPREV 0
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#define GX_TEVREG0 1
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#define GX_TEVREG1 2
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#define GX_TEVREG2 3
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#define ALPHACMP_NEVER 0
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#define ALPHACMP_LESS 1
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#define ALPHACMP_EQUAL 2
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#define ALPHACMP_LEQUAL 3
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#define ALPHACMP_NEVER 0
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#define ALPHACMP_LESS 1
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#define ALPHACMP_EQUAL 2
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#define ALPHACMP_LEQUAL 3
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#define ALPHACMP_GREATER 4
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#define ALPHACMP_NEQUAL 5
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#define ALPHACMP_GEQUAL 6
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#define ALPHACMP_ALWAYS 7
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#define ALPHACMP_NEQUAL 5
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#define ALPHACMP_GEQUAL 6
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#define ALPHACMP_ALWAYS 7
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enum Compare
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{
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@ -331,26 +318,26 @@ struct TevStageCombiner
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#define ITF_3 3
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#define ITB_NONE 0
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#define ITB_S 1
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#define ITB_T 2
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#define ITB_ST 3
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#define ITB_U 4
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#define ITB_SU 5
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#define ITB_TU 6
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#define ITB_STU 7
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#define ITB_S 1
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#define ITB_T 2
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#define ITB_ST 3
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#define ITB_U 4
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#define ITB_SU 5
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#define ITB_TU 6
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#define ITB_STU 7
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#define ITBA_OFF 0
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#define ITBA_S 1
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#define ITBA_T 2
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#define ITBA_U 3
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#define ITBA_S 1
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#define ITBA_T 2
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#define ITBA_U 3
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#define ITW_OFF 0
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#define ITW_256 1
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#define ITW_128 2
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#define ITW_64 3
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#define ITW_32 4
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#define ITW_16 5
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#define ITW_0 6
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#define ITW_64 3
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#define ITW_32 4
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#define ITW_16 5
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#define ITW_0 6
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// several discoveries:
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// GXSetTevIndBumpST(tevstage, indstage, matrixind)
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@ -384,7 +371,7 @@ struct TevStageCombiner
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u32 unused : 11;
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};
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bool IsActive() { return (hex&0x17fe00)!=0; }
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bool IsActive() { return (hex & 0x17fe00) != 0; }
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};
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union TwoTevStageOrders
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@ -482,7 +469,7 @@ union TexImage0
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{
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struct
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{
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u32 width : 10; //actually w-1
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u32 width : 10; //actually w-1
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u32 height : 10; //actually h-1
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u32 format : 4;
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};
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@ -560,14 +547,14 @@ union ZTex2
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struct FourTexUnits
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{
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TexMode0 texMode0[4];
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TexMode1 texMode1[4];
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TexImage0 texImage0[4];
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TexImage1 texImage1[4];
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TexImage2 texImage2[4];
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TexImage3 texImage3[4];
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TexTLUT texTlut[4];
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u32 unknown[4];
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TexMode0 texMode0[4];
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TexMode1 texMode1[4];
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TexImage0 texImage0[4];
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TexImage1 texImage1[4];
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TexImage2 texImage2[4];
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TexImage3 texImage3[4];
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TexTLUT texTlut[4];
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u32 unknown[4];
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};
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@ -626,6 +613,17 @@ union X10Y10
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// Framebuffer/pixel stuff (incl fog)
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#define GX_BL_ZERO 0
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#define GX_BL_ONE 1
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#define GX_BL_SRCCLR 2 // for dst factor
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#define GX_BL_INVSRCCLR 3 // for dst factor
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#define GX_BL_SRCALPHA 4
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#define GX_BL_INVSRCALPHA 5
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#define GX_BL_DSTALPHA 6
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#define GX_BL_INVDSTALPHA 7
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#define GX_BL_DSTCLR GX_BL_SRCCLR // for src factor
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#define GX_BL_INVDSTCLR GX_BL_INVSRCCLR // for src factor
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union BlendMode
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{
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struct
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@ -653,7 +651,8 @@ union FogParam0
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u32 sign : 1;
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};
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float GetA() {
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float GetA()
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{
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union { u32 i; float f; } dummy;
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dummy.i = ((u32)sign << 31) | ((u32)exponent << 23) | ((u32)mantissa << 12); // scale mantissa from 11 to 23 bits
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return dummy.f;
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@ -674,7 +673,8 @@ union FogParam3
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};
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// amount to subtract from eyespacez after range adjustment
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float GetC() {
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float GetC()
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{
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union { u32 i; float f; } dummy;
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dummy.i = ((u32)c_sign << 31) | ((u32)c_exp << 23) | ((u32)c_mant << 12); // scale mantissa from 11 to 23 bits
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return dummy.f;
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@ -913,7 +913,8 @@ union UPE_Copy
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union BPU_PreloadTileInfo
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{
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u32 hex;
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struct {
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struct
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{
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u32 count : 15;
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u32 type : 2;
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};
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