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Commit r5970 part #1: Fix what seems to be a bug in PowerPC instruction RFI: the wrong bit was cleared in MSR

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5972 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
dok.slade
2010-07-25 18:03:14 +00:00
parent fa2cfcd089
commit 68c8f345d7
2 changed files with 2 additions and 2 deletions
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2
Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp
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@ -117,7 +117,7 @@ void rfi(UGeckoInstruction _inst)
const int mask = 0x87C0FFFF; const int mask = 0x87C0FFFF;
MSR = (MSR & ~mask) | (SRR1 & mask); MSR = (MSR & ~mask) | (SRR1 & mask);
//MSR[13] is set to 0. //MSR[13] is set to 0.
MSR &= 0xFFFDFFFF; MSR &= 0xFFFBFFFF;
// Here we should check if there are pending exceptions, and if their corresponding enable bits are set // Here we should check if there are pending exceptions, and if their corresponding enable bits are set
// if above is true, we'd do: // if above is true, we'd do:
//PowerPC::CheckExceptions(); //PowerPC::CheckExceptions();

2
Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp
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@ -66,7 +66,7 @@ void Jit64::rfi(UGeckoInstruction inst)
AND(32, R(ECX), Imm32(mask)); AND(32, R(ECX), Imm32(mask));
OR(32, R(EAX), R(ECX)); OR(32, R(EAX), R(ECX));
// MSR &= 0xFFFDFFFF; //TODO: VERIFY // MSR &= 0xFFFDFFFF; //TODO: VERIFY
AND(32, R(EAX), Imm32(0xFFFDFFFF)); AND(32, R(EAX), Imm32(0xFFFBFFFF));
MOV(32, M(&MSR), R(EAX)); MOV(32, M(&MSR), R(EAX));
// NPC = SRR0; // NPC = SRR0;
MOV(32, R(EAX), M(&SRR0)); MOV(32, R(EAX), M(&SRR0));