VideoCommon/CommandProcessor: Refactor to class, move to Core::System.

Source/Core/VideoCommon/CommandProcessor.h

@@ -6,48 +6,53 @@
 #include <atomic>
 
 #include "Common/CommonTypes.h"
+#include "Common/Flag.h"
 
 class PointerWrap;
 namespace MMIO
 {
 class Mapping;
 }
+namespace Core
+{
+class System;
+}
+namespace CoreTiming
+{
+struct EventType;
+}
 
 namespace CommandProcessor
 {
 struct SCPFifoStruct
 {
   // fifo registers
-  std::atomic<u32> CPBase;
-  std::atomic<u32> CPEnd;
+  std::atomic<u32> CPBase = 0;
+  std::atomic<u32> CPEnd = 0;
   u32 CPHiWatermark = 0;
   u32 CPLoWatermark = 0;
-  std::atomic<u32> CPReadWriteDistance;
-  std::atomic<u32> CPWritePointer;
-  std::atomic<u32> CPReadPointer;
-  std::atomic<u32> CPBreakpoint;
-  std::atomic<u32> SafeCPReadPointer;
+  std::atomic<u32> CPReadWriteDistance = 0;
+  std::atomic<u32> CPWritePointer = 0;
+  std::atomic<u32> CPReadPointer = 0;
+  std::atomic<u32> CPBreakpoint = 0;
+  std::atomic<u32> SafeCPReadPointer = 0;
 
-  std::atomic<u32> bFF_GPLinkEnable;
-  std::atomic<u32> bFF_GPReadEnable;
-  std::atomic<u32> bFF_BPEnable;
-  std::atomic<u32> bFF_BPInt;
-  std::atomic<u32> bFF_Breakpoint;
+  std::atomic<u32> bFF_GPLinkEnable = 0;
+  std::atomic<u32> bFF_GPReadEnable = 0;
+  std::atomic<u32> bFF_BPEnable = 0;
+  std::atomic<u32> bFF_BPInt = 0;
+  std::atomic<u32> bFF_Breakpoint = 0;
 
-  std::atomic<u32> bFF_LoWatermarkInt;
-  std::atomic<u32> bFF_HiWatermarkInt;
+  std::atomic<u32> bFF_LoWatermarkInt = 0;
+  std::atomic<u32> bFF_HiWatermarkInt = 0;
 
-  std::atomic<u32> bFF_LoWatermark;
-  std::atomic<u32> bFF_HiWatermark;
+  std::atomic<u32> bFF_LoWatermark = 0;
+  std::atomic<u32> bFF_HiWatermark = 0;
 
   void Init();
   void DoState(PointerWrap& p);
 };
 
-// This one is shared between gfx thread and emulator thread.
-// It is only used by the Fifo and by the CommandProcessor.
-extern SCPFifoStruct fifo;
-
 // internal hardware addresses
 enum
 {
@@ -150,26 +155,54 @@ union UCPClearReg
   UCPClearReg(u16 _hex) { Hex = _hex; }
 };
 
-// Init
-void Init();
-void DoState(PointerWrap& p);
-
-void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
-
-void SetCPStatusFromGPU();
-void SetCPStatusFromCPU();
-void GatherPipeBursted();
-void UpdateInterrupts(u64 userdata);
-void UpdateInterruptsFromVideoBackend(u64 userdata);
-
-bool IsInterruptWaiting();
-
-void SetCpClearRegister();
-void SetCpControlRegister();
-void SetCpStatusRegister();
-
-void HandleUnknownOpcode(u8 cmd_byte, const u8* buffer, bool preprocess);
-
 u32 GetPhysicalAddressMask();
 
+class CommandProcessorManager
+{
+public:
+  void Init(Core::System& system);
+  void DoState(PointerWrap& p);
+
+  void RegisterMMIO(Core::System& system, MMIO::Mapping* mmio, u32 base);
+
+  void SetCPStatusFromGPU(Core::System& system);
+  void SetCPStatusFromCPU(Core::System& system);
+  void GatherPipeBursted(Core::System& system);
+  void UpdateInterrupts(Core::System& system, u64 userdata);
+  void UpdateInterruptsFromVideoBackend(Core::System& system, u64 userdata);
+
+  bool IsInterruptWaiting() const;
+
+  void SetCpClearRegister();
+  void SetCpControlRegister();
+  void SetCpStatusRegister();
+
+  void HandleUnknownOpcode(u8 cmd_byte, const u8* buffer, bool preprocess);
+
+  // This one is shared between gfx thread and emulator thread.
+  // It is only used by the Fifo and by the CommandProcessor.
+  SCPFifoStruct& GetFifo() { return m_fifo; }
+
+private:
+  SCPFifoStruct m_fifo;
+
+  CoreTiming::EventType* m_event_type_update_interrupts = nullptr;
+
+  // STATE_TO_SAVE
+  UCPStatusReg m_cp_status_reg;
+  UCPCtrlReg m_cp_ctrl_reg;
+  UCPClearReg m_cp_clear_reg;
+
+  u16 m_bbox_left = 0;
+  u16 m_bbox_top = 0;
+  u16 m_bbox_right = 0;
+  u16 m_bbox_bottom = 0;
+  u16 m_token_reg = 0;
+
+  Common::Flag m_interrupt_set;
+  Common::Flag m_interrupt_waiting;
+
+  bool m_is_fifo_error_seen = false;
+};
+
 }  // namespace CommandProcessor