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Jit64: make ForceSinglePrecision more versatile

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This commit is contained in:
Tillmann Karras
2015-05-21 12:33:36 +02:00
parent 9792976ee9
commit 6b8ab5993a
4 changed files with 30 additions and 56 deletions
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37
Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
View File

@ -640,31 +640,30 @@ void EmuCodeBlock::WriteToConstRamAddress(int accessSize, OpArg arg, u32 address
MOV(accessSize, MRegSum(RMEM, RSCRATCH2), R(reg));
}
void EmuCodeBlock::ForceSinglePrecisionS(X64Reg output, X64Reg input)
void EmuCodeBlock::ForceSinglePrecision(X64Reg output, OpArg input, bool packed, bool duplicate)
{
// Most games don't need these. Zelda requires it though - some platforms get stuck without them.
if (jit->jo.accurateSinglePrecision)
{
CVTSD2SS(output, R(input));
CVTSS2SD(output, R(output));
if (packed)
{
CVTPD2PS(output, input);
CVTPS2PD(output, R(output));
}
else
{
CVTSD2SS(output, input);
CVTSS2SD(output, R(output));
if (duplicate)
MOVDDUP(output, R(output));
}
}
else if (output != input)
else if (!input.IsSimpleReg() || input.GetSimpleReg() != output)
{
MOVAPD(output, R(input));
}
}
void EmuCodeBlock::ForceSinglePrecisionP(X64Reg output, X64Reg input)
{
// Most games don't need these. Zelda requires it though - some platforms get stuck without them.
if (jit->jo.accurateSinglePrecision)
{
CVTPD2PS(output, R(input));
CVTPS2PD(output, R(output));
}
else if (output != input)
{
MOVAPD(output, R(input));
if (duplicate)
MOVDDUP(output, input);
else
MOVAPD(output, input);
}
}

3
Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
View File

@ -121,8 +121,7 @@ public:
void avx_op(void (Gen::XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, Gen::OpArg, u8), void (Gen::XEmitter::*sseOp)(Gen::X64Reg, Gen::OpArg, u8),
Gen::X64Reg regOp, Gen::OpArg arg1, Gen::OpArg arg2, u8 imm);
void ForceSinglePrecisionS(Gen::X64Reg output, Gen::X64Reg input);
void ForceSinglePrecisionP(Gen::X64Reg output, Gen::X64Reg input);
void ForceSinglePrecision(Gen::X64Reg output, Gen::OpArg input, bool packed = true, bool duplicate = false);
void Force25BitPrecision(Gen::X64Reg output, Gen::OpArg input, Gen::X64Reg tmp);
// RSCRATCH might get trashed