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synced 2025-07-30 01:29:42 -06:00
Rename bpmem.copyMipMapStrideChannels to bpmem.copyDestStride
As far as I can tell, it has nothing to do with the mipmap/half_scale functionality, but does change based on the width of the destination texture (and the destination texture is half the width if half_scale is set). The comment that was there (which dates back to the initial megacommit) seems to not have accounted for the width aspect; it was first used as an actual stride in bbbe898839
(the first commit that used it at all).
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@ -56,7 +56,7 @@ enum
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BPMEM_EFB_TL = 0x49,
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BPMEM_EFB_WH = 0x4A,
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BPMEM_EFB_ADDR = 0x4B,
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BPMEM_MIPMAP_STRIDE = 0x4D,
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BPMEM_EFB_STRIDE = 0x4D,
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BPMEM_COPYYSCALE = 0x4E,
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BPMEM_CLEAR_AR = 0x4F,
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BPMEM_CLEAR_GB = 0x50,
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@ -2426,35 +2426,32 @@ struct BPMemory
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// the 3 offset matrices can either be indirect type, S-type, or T-type
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// 6bit scale factor s is distributed across IND_MTXA/B/C.
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// before using matrices scale by 2^-(s-17)
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IND_MTX indmtx[3]; // 0x06-0x0e: GXSetIndTexMtx, 2x3 matrices
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IND_IMASK imask; // 0x0f
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TevStageIndirect tevind[16]; // 0x10-0x1f: GXSetTevIndirect
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ScissorPos scissorTL; // 0x20
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ScissorPos scissorBR; // 0x21
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LPSize lineptwidth; // 0x22
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u32 sucounter; // 0x23
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u32 rascounter; // 0x24
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TEXSCALE texscale[2]; // 0x25,0x26: GXSetIndTexCoordScale
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RAS1_IREF tevindref; // 0x27: GXSetIndTexOrder
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TwoTevStageOrders tevorders[8]; // 0x28-0x2f
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TCoordInfo texcoords[8]; // 0x30-0x3f: s,t,s,t,s,t,s,t...
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ZMode zmode; // 0x40
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BlendMode blendmode; // 0x41
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ConstantAlpha dstalpha; // 0x42
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PEControl zcontrol; // 0x43: GXSetZCompLoc, GXPixModeSync
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FieldMask fieldmask; // 0x44
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u32 drawdone; // 0x45: bit1=1 if end of list
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u32 unknown5; // 0x46: clock?
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u32 petoken; // 0x47
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u32 petokenint; // 0x48
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X10Y10 copyTexSrcXY; // 0x49
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X10Y10 copyTexSrcWH; // 0x4a
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u32 copyTexDest; // 0x4b: CopyAddress (GXDispCopy and GXTexCopy use it)
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u32 unknown6; // 0x4c
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// usually set to 4 when dest is single channel, 8 when dest is 2 channel, 16 when dest is RGBA
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// also, doubles whenever mipmap box filter option is set (excent on RGBA). Probably to do
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// with number of bytes to look at when smoothing
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u32 copyMipMapStrideChannels; // 0x4d
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IND_MTX indmtx[3]; // 0x06-0x0e: GXSetIndTexMtx, 2x3 matrices
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IND_IMASK imask; // 0x0f
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TevStageIndirect tevind[16]; // 0x10-0x1f: GXSetTevIndirect
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ScissorPos scissorTL; // 0x20
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ScissorPos scissorBR; // 0x21
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LPSize lineptwidth; // 0x22
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u32 sucounter; // 0x23
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u32 rascounter; // 0x24
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TEXSCALE texscale[2]; // 0x25,0x26: GXSetIndTexCoordScale
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RAS1_IREF tevindref; // 0x27: GXSetIndTexOrder
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TwoTevStageOrders tevorders[8]; // 0x28-0x2f
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TCoordInfo texcoords[8]; // 0x30-0x3f: s,t,s,t,s,t,s,t...
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ZMode zmode; // 0x40
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BlendMode blendmode; // 0x41
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ConstantAlpha dstalpha; // 0x42
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PEControl zcontrol; // 0x43: GXSetZCompLoc, GXPixModeSync
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FieldMask fieldmask; // 0x44
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u32 drawdone; // 0x45: bit1=1 if end of list
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u32 unknown5; // 0x46: clock?
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u32 petoken; // 0x47
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u32 petokenint; // 0x48
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X10Y10 copyTexSrcXY; // 0x49
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X10Y10 copyTexSrcWH; // 0x4a
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u32 copyTexDest; // 0x4b: CopyAddress (GXDispCopy and GXTexCopy use it)
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u32 unknown6; // 0x4c
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u32 copyDestStride; // 0x4d
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u32 dispcopyyscale; // 0x4e
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u32 clearcolorAR; // 0x4f
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u32 clearcolorGB; // 0x50
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@ -246,7 +246,7 @@ static void BPWritten(PixelShaderManager& pixel_shader_manager,
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// this function
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u32 destAddr = bpmem.copyTexDest << 5;
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u32 destStride = bpmem.copyMipMapStrideChannels << 5;
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u32 destStride = bpmem.copyDestStride << 5;
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MathUtil::Rectangle<s32> srcRect;
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srcRect.left = bpmem.copyTexSrcXY.x;
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@ -515,8 +515,8 @@ static void BPWritten(PixelShaderManager& pixel_shader_manager,
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pixel_shader_manager.SetZModeControl();
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return;
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case BPMEM_MIPMAP_STRIDE: // MipMap Stride Channel
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case BPMEM_COPYYSCALE: // Display Copy Y Scale
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case BPMEM_EFB_STRIDE: // Display Copy Stride
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case BPMEM_COPYYSCALE: // Display Copy Y Scale
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/* 24 RID
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* 21 BC3 - Ind. Tex Stage 3 NTexCoord
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@ -982,8 +982,8 @@ std::pair<std::string, std::string> GetBPRegInfo(u8 cmd, u32 cmddata)
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RegName(BPMEM_EFB_ADDR),
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fmt::format("EFB Target address (32 byte aligned): 0x{:06X}", cmddata << 5));
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case BPMEM_MIPMAP_STRIDE: // 0x4D
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return DescriptionlessReg(BPMEM_MIPMAP_STRIDE);
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case BPMEM_EFB_STRIDE: // 0x4D
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return DescriptionlessReg(BPMEM_EFB_STRIDE);
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// TODO: Description
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case BPMEM_COPYYSCALE: // 0x4E
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