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DSP - fix ROM loading (seriously, have we only been loading half the ROMs??? doesn't make sense).

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Also delete some unused old junk variables. Add some comments. Start #defining SR flag constants. "implement" nx.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2872 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard
2009-04-05 11:55:18 +00:00
parent a9e71fe351
commit 6eb6db21ce
7 changed files with 107 additions and 82 deletions
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86
Source/Plugins/Plugin_DSP_LLE-testing/Src/gdsp_interpreter.cpp
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@ -52,28 +52,31 @@ u8 SDSP::exceptions;
// lets make stack depth to 32 for now
u16 SDSP::reg_stack[4][DSP_STACK_DEPTH];
void (*SDSP::irq_request)() = NULL;
bool SDSP::exception_in_progress_hack = false;
bool SDSP::exception_in_progress_hack = false; // should be replaced with bit9 in SR?
// for debugger only
bool SDSP::dump_imem = false;
u32 SDSP::iram_crc = 0;
u64 SDSP::step_counter = 0;
//-------------------------------------------------------------------------------
static bool CR_HALT = true;
static bool CR_EXTERNAL_INT = false;
bool gdsp_running;
extern volatile u32 dsp_running;
static bool cr_halt = true;
static bool cr_external_int = false;
// SR flag defines.
// These are probably not accurate. Do not use yet.
#define SR_LOGIC_ZERO 0x0040 // ?? duddie's doc sometimes say & 1<<6, sometimes 1<<14 (0x4000)
#define SR_PROD_MUL2 0x2000
#define SR_SIGN 0x0008
#define SR_ARITH_ZERO 0x0002
#define SR_INT_ENABLE 0x0200
void UpdateCachedCR()
{
CR_HALT = (g_dsp.cr & 0x4) != 0;
CR_EXTERNAL_INT = (g_dsp.cr & 0x02) != 0;
cr_halt = (g_dsp.cr & 0x4) != 0;
cr_external_int = (g_dsp.cr & 0x02) != 0;
}
//-------------------------------------------------------------------------------
@ -85,12 +88,14 @@ void dbg_error(char* err_msg)
void gdsp_init()
{
// Why do we have DROM? Does it exist? Has it been dumped?
g_dsp.irom = (u16*)malloc(DSP_IROM_SIZE * sizeof(u16));
g_dsp.iram = (u16*)malloc(DSP_IRAM_SIZE * sizeof(u16));
g_dsp.drom = (u16*)malloc(DSP_DROM_SIZE * sizeof(u16));
g_dsp.dram = (u16*)malloc(DSP_DRAM_SIZE * sizeof(u16));
g_dsp.coef = (u16*)malloc(DSP_COEF_SIZE * sizeof(u16));
// Fill memories with junk.
for (int i = 0; i < DSP_IRAM_SIZE; i++)
{
g_dsp.iram[i] = 0x0021; // HALT opcode
@ -101,6 +106,8 @@ void gdsp_init()
g_dsp.dram[i] = 0x0021; // HALT opcode
}
// Fill roms with zeros.
for (int i = 0; i < 32; i++)
{
g_dsp.r[i] = 0;
@ -132,7 +139,7 @@ void gdsp_init()
void gdsp_reset()
{
// _assert_msg_(0, "gdsp_reset()");
_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "reset while exception");
g_dsp.pc = DSP_RESET_VECTOR;
g_dsp.exception_in_progress_hack = false;
}
@ -144,36 +151,51 @@ void gdsp_generate_exception(u8 level)
}
bool gdsp_load_rom(char* fname)
bool gdsp_load_rom(const char *fname)
{
FILE* pFile = fopen(fname, "rb");
FILE *pFile = fopen(fname, "rb");
if (pFile)
{
fread(g_dsp.irom, 1, DSP_IRAM_SIZE, pFile);
size_t size_in_bytes = DSP_IROM_SIZE * sizeof(u16);
size_t read_bytes = fread(g_dsp.irom, 1, size_in_bytes, pFile);
if (read_bytes != size_in_bytes)
{
PanicAlert("IROM too short : %i/%i", (int)read_bytes, (int)size_in_bytes);
fclose(pFile);
return false;
}
fclose(pFile);
return(true);
return true;
}
return(false);
return false;
}
bool gdsp_load_coef(char* fname)
bool gdsp_load_coef(const char *fname)
{
FILE* pFile = fopen(fname, "rb");
FILE *pFile = fopen(fname, "rb");
if (pFile)
{
fread(g_dsp.coef, 1, DSP_COEF_SIZE, pFile);
size_t size_in_bytes = DSP_COEF_SIZE * sizeof(u16);
size_t read_bytes = fread(g_dsp.coef, 1, size_in_bytes, pFile);
if (read_bytes != size_in_bytes)
{
PanicAlert("COEF too short : %i/%i", (int)read_bytes, (int)size_in_bytes);
fclose(pFile);
return false;
}
fclose(pFile);
return(true);
return true;
}
return(false);
return false;
}
// Hm, should instructions that change CR use this? Probably not (but they
// should call UpdateCachedCR())
void gdsp_write_cr(u16 val)
{
// reset
@ -191,7 +213,8 @@ void gdsp_write_cr(u16 val)
}
u16 gdsp_read_cr()
// Hm, should instructions that read CR use this? (Probably not).
u16 gdsp_read_cr()
{
if (g_dsp.pc & 0x8000)
{
@ -204,14 +227,17 @@ u16 gdsp_read_cr()
UpdateCachedCR();
return(g_dsp.cr);
return g_dsp.cr;
}
// special loop step.. because exception in loop or loopi fails
// dunno how we have to fix it
// atm we execute this instructions directly inside the loop command
// so it cant be interrupted by an exception
// so it cant be interrupted by an exception.
// TODO - we really should figure this out - on the real DSP, exception inside
// loop should work. Think through the stack management and how it works
// with exceptions and in loops.
void gdsp_loop_step()
{
g_dsp.err_pc = g_dsp.pc;
@ -275,7 +301,7 @@ void gdsp_step()
}
// check if there is an external interrupt
if (CR_EXTERNAL_INT)
if (cr_external_int)
{
if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false))
{
@ -313,16 +339,16 @@ bool gdsp_run()
{
gdsp_running = true;
while (!CR_HALT)
while (!cr_halt)
{
gdsp_step();
if(!gdsp_running)
if (!gdsp_running)
break;
}
gdsp_running = false;
return(true);
return true;
}
@ -342,7 +368,7 @@ bool gdsp_runx(u16 cnt)
}
gdsp_running = false;
return(true);
return true;
}