mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-07-23 06:09:50 -06:00
Clean up most (99.99%) of the tab/space mismatches in the VideoSoftware project.
Got rid of trailing spaces that were unnecessary too. Also update the license header for this project. We don't use SVN anymore.
This commit is contained in:
@ -12,7 +12,7 @@
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// Official Git repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#include "VideoCommon.h"
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@ -29,67 +29,67 @@
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void InitBPMemory()
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{
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memset(&bpmem, 0, sizeof(bpmem));
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bpmem.bpMask = 0xFFFFFF;
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memset(&bpmem, 0, sizeof(bpmem));
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bpmem.bpMask = 0xFFFFFF;
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}
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void SWLoadBPReg(u32 value)
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{
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//handle the mask register
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//handle the mask register
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int address = value >> 24;
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int oldval = ((u32*)&bpmem)[address];
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int newval = (oldval & ~bpmem.bpMask) | (value & bpmem.bpMask);
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((u32*)&bpmem)[address] = newval;
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((u32*)&bpmem)[address] = newval;
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//reset the mask register
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if (address != 0xFE)
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bpmem.bpMask = 0xFFFFFF;
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SWBPWritten(address, newval);
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SWBPWritten(address, newval);
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}
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void SWBPWritten(int address, int newvalue)
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{
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switch (address)
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switch (address)
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{
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case BPMEM_SCISSORTL:
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case BPMEM_SCISSORBR:
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case BPMEM_SCISSOROFFSET:
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Rasterizer::SetScissor();
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break;
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case BPMEM_SCISSORTL:
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case BPMEM_SCISSORBR:
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case BPMEM_SCISSOROFFSET:
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Rasterizer::SetScissor();
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break;
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case BPMEM_SETDRAWDONE: // This is called when the game is done drawing (eg: like in DX: Begin(); Draw(); End();)
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switch (bpmem.drawdone & 0xFF)
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{
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case 0x02:
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SWPixelEngine::SetFinish(); // may generate interrupt
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DEBUG_LOG(VIDEO, "GXSetDrawDone SetPEFinish (value: 0x%02X)", (bpmem.drawdone & 0xFFFF));
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break;
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{
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case 0x02:
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SWPixelEngine::SetFinish(); // may generate interrupt
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DEBUG_LOG(VIDEO, "GXSetDrawDone SetPEFinish (value: 0x%02X)", (bpmem.drawdone & 0xFFFF));
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break;
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default:
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WARN_LOG(VIDEO, "GXSetDrawDone ??? (value 0x%02X)", (bpmem.drawdone & 0xFFFF));
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break;
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}
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break;
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default:
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WARN_LOG(VIDEO, "GXSetDrawDone ??? (value 0x%02X)", (bpmem.drawdone & 0xFFFF));
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break;
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}
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break;
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case BPMEM_PE_TOKEN_ID: // Pixel Engine Token ID
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DEBUG_LOG(VIDEO, "SetPEToken 0x%04x", (bpmem.petoken & 0xFFFF));
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SWPixelEngine::SetToken(static_cast<u16>(bpmem.petokenint & 0xFFFF), false);
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break;
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case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
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DEBUG_LOG(VIDEO, "SetPEToken + INT 0x%04x", (bpmem.petokenint & 0xFFFF));
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SWPixelEngine::SetToken(static_cast<u16>(bpmem.petokenint & 0xFFFF), true);
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break;
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case BPMEM_TRIGGER_EFB_COPY:
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EfbCopy::CopyEfb();
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break;
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case BPMEM_CLEARBBOX1:
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SWPixelEngine::pereg.boxRight = newvalue >> 10;
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SWPixelEngine::pereg.boxLeft = newvalue & 0x3ff;
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break;
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case BPMEM_CLEARBBOX2:
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SWPixelEngine::pereg.boxBottom = newvalue >> 10;
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SWPixelEngine::pereg.boxTop = newvalue & 0x3ff;
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break;
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DEBUG_LOG(VIDEO, "SetPEToken 0x%04x", (bpmem.petoken & 0xFFFF));
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SWPixelEngine::SetToken(static_cast<u16>(bpmem.petokenint & 0xFFFF), false);
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break;
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case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
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DEBUG_LOG(VIDEO, "SetPEToken + INT 0x%04x", (bpmem.petokenint & 0xFFFF));
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SWPixelEngine::SetToken(static_cast<u16>(bpmem.petokenint & 0xFFFF), true);
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break;
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case BPMEM_TRIGGER_EFB_COPY:
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EfbCopy::CopyEfb();
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break;
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case BPMEM_CLEARBBOX1:
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SWPixelEngine::pereg.boxRight = newvalue >> 10;
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SWPixelEngine::pereg.boxLeft = newvalue & 0x3ff;
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break;
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case BPMEM_CLEARBBOX2:
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SWPixelEngine::pereg.boxBottom = newvalue >> 10;
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SWPixelEngine::pereg.boxTop = newvalue & 0x3ff;
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break;
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case BPMEM_CLEAR_PIXEL_PERF:
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// TODO: I didn't test if the value written to this register affects the amount of cleared registers
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SWPixelEngine::pereg.perfZcompInputZcomplocLo = 0;
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@ -105,16 +105,16 @@ void SWBPWritten(int address, int newvalue)
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SWPixelEngine::pereg.perfEfbCopyClocksLo = 0;
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SWPixelEngine::pereg.perfEfbCopyClocksHi = 0;
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break;
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case BPMEM_LOADTLUT0: // This one updates bpmem.tlutXferSrc, no need to do anything here.
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case BPMEM_LOADTLUT0: // This one updates bpmem.tlutXferSrc, no need to do anything here.
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break;
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case BPMEM_LOADTLUT1: // Load a Texture Look Up Table
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{
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u32 tlutTMemAddr = (newvalue & 0x3FF) << 9;
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u32 tlutXferCount = (newvalue & 0x1FFC00) >> 5;
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{
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u32 tlutTMemAddr = (newvalue & 0x3FF) << 9;
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u32 tlutXferCount = (newvalue & 0x1FFC00) >> 5;
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u8 *ptr = 0;
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// TODO - figure out a cleaner way.
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// TODO - figure out a cleaner way.
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if (Core::g_CoreStartupParameter.bWii)
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ptr = Memory::GetPointer(bpmem.tmem_config.tlut_src << 5);
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else
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@ -125,7 +125,7 @@ void SWBPWritten(int address, int newvalue)
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else
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PanicAlert("Invalid palette pointer %08x %08x %08x", bpmem.tmem_config.tlut_src, bpmem.tmem_config.tlut_src << 5, (bpmem.tmem_config.tlut_src & 0xFFFFF)<< 5);
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break;
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}
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}
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case BPMEM_PRELOAD_MODE:
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if (newvalue != 0)
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@ -166,36 +166,36 @@ void SWBPWritten(int address, int newvalue)
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}
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break;
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case BPMEM_TEV_REGISTER_L: // Reg 1
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case BPMEM_TEV_REGISTER_L: // Reg 1
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case BPMEM_TEV_REGISTER_L+2: // Reg 2
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case BPMEM_TEV_REGISTER_L+4: // Reg 3
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case BPMEM_TEV_REGISTER_L+6: // Reg 4
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{
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int regNum = (address >> 1 ) & 0x3;
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ColReg& reg = bpmem.tevregs[regNum].low;
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bool konst = reg.type;
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ColReg& reg = bpmem.tevregs[regNum].low;
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bool konst = reg.type;
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Rasterizer::SetTevReg(regNum, Tev::ALP_C, konst, reg.b); // A
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Rasterizer::SetTevReg(regNum, Tev::RED_C, konst, reg.a); // R
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Rasterizer::SetTevReg(regNum, Tev::RED_C, konst, reg.a); // R
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break;
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}
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case BPMEM_TEV_REGISTER_H: // Reg 1
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case BPMEM_TEV_REGISTER_H: // Reg 1
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case BPMEM_TEV_REGISTER_H+2: // Reg 2
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case BPMEM_TEV_REGISTER_H+4: // Reg 3
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case BPMEM_TEV_REGISTER_H+6: // Reg 4
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{
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int regNum = (address >> 1 ) & 0x3;
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ColReg& reg = bpmem.tevregs[regNum].high;
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bool konst = reg.type;
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ColReg& reg = bpmem.tevregs[regNum].high;
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bool konst = reg.type;
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Rasterizer::SetTevReg(regNum, Tev::GRN_C, konst, reg.b); // G
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Rasterizer::SetTevReg(regNum, Tev::BLU_C, konst, reg.a); // B
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Rasterizer::SetTevReg(regNum, Tev::GRN_C, konst, reg.b); // G
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Rasterizer::SetTevReg(regNum, Tev::BLU_C, konst, reg.a); // B
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break;
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}
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}
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}
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}
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