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ShaderGen: Implement pixel ubershaders
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@ -93,6 +93,9 @@ static void BPWritten(const BPCmd& bp)
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(u32)bpmem.genMode.cullmode, (u32)bpmem.genMode.numindstages,
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(u32)bpmem.genMode.zfreeze);
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if (bp.changes)
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PixelShaderManager::SetGenModeChanged();
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// Only call SetGenerationMode when cull mode changes.
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if (bp.changes & 0xC000)
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SetGenerationMode();
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@ -155,13 +158,20 @@ static void BPWritten(const BPCmd& bp)
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// Set Color Mask
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if (bp.changes & 0x18) // colorupdate | alphaupdate
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SetColorMask();
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// Dither
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if (bp.changes & 0x04)
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PixelShaderManager::SetBlendModeChanged();
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}
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return;
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha.Value(),
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bpmem.dstalpha.enable.Value());
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if (bp.changes & 0xFF)
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PixelShaderManager::SetDestAlpha();
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if (bp.changes)
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{
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PixelShaderManager::SetAlpha();
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PixelShaderManager::SetDestAlphaChanged();
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}
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if (bp.changes & 0x100)
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SetBlendMode();
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return;
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@ -238,6 +248,7 @@ static void BPWritten(const BPCmd& bp)
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// the number of lines copied is determined by the y scale * source efb height
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BoundingBox::active = false;
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PixelShaderManager::SetBoundingBoxActive(false);
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float yScale;
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if (PE_copy.scale_invert)
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@ -318,6 +329,7 @@ static void BPWritten(const BPCmd& bp)
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PixelShaderManager::SetAlpha();
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if (bp.changes)
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{
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PixelShaderManager::SetAlphaTestChanged();
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g_renderer->SetColorMask();
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SetBlendMode();
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}
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@ -332,7 +344,7 @@ static void BPWritten(const BPCmd& bp)
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if (bp.changes & 3)
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PixelShaderManager::SetZTextureTypeChanged();
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if (bp.changes & 12)
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VertexShaderManager::SetViewportChanged();
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PixelShaderManager::SetZTextureOpChanged();
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#if defined(_DEBUG) || defined(DEBUGFAST)
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const char* pzop[] = {"DISABLE", "ADD", "REPLACE", "?"};
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const char* pztype[] = {"Z8", "Z16", "Z24", "?"};
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@ -390,6 +402,7 @@ static void BPWritten(const BPCmd& bp)
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{
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u8 offset = bp.address & 2;
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BoundingBox::active = true;
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PixelShaderManager::SetBoundingBoxActive(true);
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if (g_ActiveConfig.backend_info.bSupportsBBox && g_ActiveConfig.bBBoxEnable)
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{
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@ -426,6 +439,11 @@ static void BPWritten(const BPCmd& bp)
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* 3 BC0 - Ind. Tex Stage 0 NTexCoord
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* 0 BI0 - Ind. Tex Stage 0 NTexMap */
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case BPMEM_IREF:
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{
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if (bp.changes)
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PixelShaderManager::SetTevIndirectChanged();
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return;
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}
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case BPMEM_TEV_KSEL: // Texture Environment Swap Mode Table 0
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case BPMEM_TEV_KSEL + 1: // Texture Environment Swap Mode Table 1
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@ -435,6 +453,8 @@ static void BPWritten(const BPCmd& bp)
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case BPMEM_TEV_KSEL + 5: // Texture Environment Swap Mode Table 5
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case BPMEM_TEV_KSEL + 6: // Texture Environment Swap Mode Table 6
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case BPMEM_TEV_KSEL + 7: // Texture Environment Swap Mode Table 7
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PixelShaderManager::SetTevKSel(bp.address - BPMEM_TEV_KSEL, bp.newvalue);
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return;
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/* This Register can be used to limit to which bits of BP registers is
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* actually written to. The mask is only valid for the next BP write,
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@ -567,6 +587,7 @@ static void BPWritten(const BPCmd& bp)
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// -------------------------
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case BPMEM_TREF:
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case BPMEM_TREF + 4:
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PixelShaderManager::SetTevOrder(bp.address - BPMEM_TREF, bp.newvalue);
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return;
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// ----------------------
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// Set wrap size
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@ -630,15 +651,18 @@ static void BPWritten(const BPCmd& bp)
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// --------------
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// Indirect Tev
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// --------------
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case BPMEM_IND_CMD: // Indirect 0-15
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case BPMEM_IND_CMD:
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PixelShaderManager::SetTevIndirectChanged();
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return;
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// --------------------------------------------------
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// Set Color/Alpha of a Tev
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// BPMEM_TEV_COLOR_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D
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// BPMEM_TEV_ALPHA_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D, T Swap, R Swap
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// --------------------------------------------------
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case BPMEM_TEV_COLOR_ENV: // Texture Environment Color/Alpha 0-7
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case BPMEM_TEV_COLOR_ENV + 16: // Texture Environment Color/Alpha 8-15
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case BPMEM_TEV_COLOR_ENV: // Texture Environment 1
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case BPMEM_TEV_COLOR_ENV + 16:
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PixelShaderManager::SetTevCombiner((bp.address - BPMEM_TEV_COLOR_ENV) >> 1,
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(bp.address - BPMEM_TEV_COLOR_ENV) & 1, bp.newvalue);
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return;
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default:
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break;
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