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https://github.com/dolphin-emu/dolphin.git
synced 2024-11-15 05:47:56 -07:00
[AArch64] Optimize slowmem paired stores.
This came up from the discussion we were having prior about dumping half of a kilobyte of VFP registers to the stack is insanity. This was due to me basically copying exactly what I did on ARMv7's paired loadstores, where the impact is less since we only use the bottom 64bits of the VFP registers. So I decided to think about how to improve upon this since I got called out on my terrible code. The solution I have come up with is instead of jumping to the common ASM routine and having that check if it needs to take the fastmem or slowmem routes, just inline the check in to the JIT block and jump to either a fastmem or slowmem handler. Fairly simple, and this allows us to only flush the registers that are required when doing so. Should give a reasonable increase in performance for games that use the slowmem path quite a lot.
This commit is contained in:
Ryan Houdek
parent
f6511c3ba5
commit
7f50cc0873
@ -94,9 +94,18 @@ void JitArm64::psq_st(UGeckoInstruction inst)
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fpr.Lock(Q0, Q1);
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ARM64Reg arm_addr = gpr.R(inst.RA);
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ARM64Reg VS = fpr.R(inst.RS);
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ARM64Reg scale_reg = W0;
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ARM64Reg addr_reg = W1;
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ARM64Reg type_reg = gpr.GetReg();
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ARM64Reg type_reg = W2;
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BitSet32 gprs_in_use = gpr.GetCallerSavedUsed();
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BitSet32 fprs_in_use = fpr.GetCallerSavedUsed();
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// Wipe the registers we are using as temporaries
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gprs_in_use &= BitSet32(~0x40000007);
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fprs_in_use &= BitSet32(~3);
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LDR(INDEX_UNSIGNED, scale_reg, X29, PPCSTATE_OFF(spr[SPR_GQR0 + inst.I]));
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@ -118,13 +127,35 @@ void JitArm64::psq_st(UGeckoInstruction inst)
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if (update)
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MOV(arm_addr, addr_reg);
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ARM64Reg VS = fpr.R(inst.RS);
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m_float_emit.FCVTN(32, D0, VS);
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MOVI2R(X30, (u64)&asm_routines.pairedStoreQuantized[inst.W * 8]);
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LDR(X30, X30, ArithOption(EncodeRegTo64(type_reg), true));
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BLR(X30);
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gpr.Unlock(W0, W1, W2, W30, type_reg);
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// Inline address check
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{
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TST(addr_reg, 6, 1);
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FixupBranch argh = B(CC_NEQ);
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// Fast
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MOVI2R(X30, (u64)&asm_routines.pairedStoreQuantized[inst.W * 8]);
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LDR(EncodeRegTo64(type_reg), X30, ArithOption(EncodeRegTo64(type_reg), true));
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BLR(EncodeRegTo64(type_reg));
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FixupBranch continue1 = B();
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SetJumpTarget(argh);
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// Slow
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MOVI2R(X30, (u64)&asm_routines.pairedStoreQuantized[16 + inst.W * 8]);
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LDR(EncodeRegTo64(type_reg), X30, ArithOption(EncodeRegTo64(type_reg), true));
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ABI_PushRegisters(gprs_in_use);
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m_float_emit.ABI_PushRegisters(fprs_in_use, X30);
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BLR(EncodeRegTo64(type_reg));
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m_float_emit.ABI_PopRegisters(fprs_in_use, X30);
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ABI_PushRegisters(gprs_in_use);
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SetJumpTarget(continue1);
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}
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gpr.Unlock(W0, W1, W2, W30);
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fpr.Unlock(Q0, Q1);
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}
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@ -107,7 +107,6 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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ARM64Reg addr_reg = X1;
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ARM64Reg scale_reg = X0;
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ARM64FloatEmitter float_emit(this);
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const u32 GPR_CALLER_SAVE = 0x6007FFFF;
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const u8* loadPairedIllegal = GetCodePtr();
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BRK(100);
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@ -263,36 +262,27 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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// Stores
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const u8* storePairedIllegal = GetCodePtr();
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BRK(0x101);
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const u8* storePairedFloat = GetCodePtr();
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const u8* storePairedFloat;
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const u8* storePairedFloatSlow;
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storePairedFloat = GetCodePtr();
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float_emit.REV32(8, D0, D0);
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(64, Q0, 0, addr_reg, SP);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storePairedFloatSlow = GetCodePtr();
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float_emit.UMOV(64, X0, Q0, 0);
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ORR(X0, SP, X0, ArithOption(X0, ST_ROR, 32));
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MOVI2R(X30, (u64)PowerPC::Write_U64);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)PowerPC::Write_U64);
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BR(X2);
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}
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const u8* storePairedU8 = GetCodePtr();
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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const u8* storePairedU8;
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const u8* storePairedU8Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -300,30 +290,26 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZU(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.XTN(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storePairedU8 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(16, Q0, 0, addr_reg, SP);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storePairedU8Slow = GetCodePtr();
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emit_quantize();
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float_emit.UMOV(16, W0, Q0, 0);
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REV16(W0, W0);
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MOVI2R(X30, (u64)PowerPC::Write_U16);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)PowerPC::Write_U16);
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BR(X2);
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}
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const u8* storePairedS8 = GetCodePtr();
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const u8* storePairedS8;
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const u8* storePairedS8Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -331,31 +317,27 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZS(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.XTN(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storePairedS8 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(16, Q0, 0, addr_reg, SP);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storePairedS8Slow = GetCodePtr();
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emit_quantize();
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float_emit.UMOV(16, W0, Q0, 0);
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REV16(W0, W0);
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MOVI2R(X30, (u64)PowerPC::Write_U16);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)PowerPC::Write_U16);
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BR(X2);
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}
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const u8* storePairedU16 = GetCodePtr();
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const u8* storePairedU16;
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const u8* storePairedU16Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -363,29 +345,26 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZU(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.REV16(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storePairedU16 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(32, Q0, 0, addr_reg, SP);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storePairedU16Slow = GetCodePtr();
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emit_quantize();
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float_emit.REV32(8, D0, D0);
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float_emit.UMOV(32, W0, Q0, 0);
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MOVI2R(X30, (u64)PowerPC::Write_U32);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)PowerPC::Write_U32);
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BR(X2);
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}
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const u8* storePairedS16 = GetCodePtr(); // Used by Viewtiful Joe's intro movie
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const u8* storePairedS16; // Used by Viewtiful Joe's intro movie
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const u8* storePairedS16Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -393,54 +372,41 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZS(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.REV16(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storePairedS16 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(32, Q0, 0, addr_reg, SP);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storePairedS16Slow = GetCodePtr();
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emit_quantize();
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float_emit.REV32(8, D0, D0);
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float_emit.UMOV(32, W0, Q0, 0);
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MOVI2R(X30, (u64)PowerPC::Write_U32);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)PowerPC::Write_U32);
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BR(X2);
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}
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const u8* storeSingleFloat = GetCodePtr();
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const u8* storeSingleFloat;
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const u8* storeSingleFloatSlow;
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storeSingleFloat = GetCodePtr();
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float_emit.REV32(8, D0, D0);
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.STR(32, INDEX_UNSIGNED, D0, addr_reg, 0);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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storeSingleFloatSlow = GetCodePtr();
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float_emit.UMOV(32, W0, Q0, 0);
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MOVI2R(X30, (u64)&PowerPC::Write_U32);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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MOVI2R(X2, (u64)&PowerPC::Write_U32);
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BR(X2);
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}
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const u8* storeSingleU8 = GetCodePtr(); // Used by MKWii
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const u8* storeSingleU8; // Used by MKWii
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const u8* storeSingleU8Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -448,28 +414,25 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZU(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.XTN(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storeSingleU8 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(8, Q0, 0, addr_reg);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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float_emit.UMOV(32, W0, Q0, 0);
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MOVI2R(X30, (u64)&PowerPC::Write_U8);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
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storeSingleU8Slow = GetCodePtr();
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emit_quantize();
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float_emit.UMOV(8, W0, Q0, 0);
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MOVI2R(X2, (u64)&PowerPC::Write_U8);
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BR(X2);
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}
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const u8* storeSingleS8 = GetCodePtr();
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const u8* storeSingleS8;
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const u8* storeSingleS8Slow;
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{
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auto emit_quantize = [this, &float_emit, scale_reg]()
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{
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BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
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BitSet32 fprs(~3); // All except Q0/Q1
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MOVI2R(X2, (u64)&m_quantizeTableS);
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ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
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float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
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@ -477,85 +440,77 @@ void JitArm64AsmRoutineManager::GenerateCommon()
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float_emit.FCVTZS(32, D0, D0);
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float_emit.XTN(16, D0, D0);
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float_emit.XTN(8, D0, D0);
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};
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TST(DecodeReg(addr_reg), 6, 1);
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FixupBranch argh = B(CC_NEQ);
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storeSingleS8 = GetCodePtr();
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emit_quantize();
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MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
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float_emit.ST1(8, Q0, 0, addr_reg);
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RET(X30);
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SetJumpTarget(argh);
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ABI_PushRegisters(gprs);
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float_emit.ABI_PushRegisters(fprs, X3);
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float_emit.SMOV(32, W0, Q0, 0);
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MOVI2R(X30, (u64)&PowerPC::Write_U8);
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BLR(X30);
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float_emit.ABI_PopRegisters(fprs, X3);
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ABI_PopRegisters(gprs);
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RET(X30);
|
||||
storeSingleS8Slow = GetCodePtr();
|
||||
emit_quantize();
|
||||
float_emit.SMOV(8, W0, Q0, 0);
|
||||
MOVI2R(X2, (u64)&PowerPC::Write_U8);
|
||||
BR(X2);
|
||||
}
|
||||
const u8* storeSingleU16 = GetCodePtr(); // Used by MKWii
|
||||
const u8* storeSingleU16; // Used by MKWii
|
||||
const u8* storeSingleU16Slow;
|
||||
{
|
||||
auto emit_quantize = [this, &float_emit, scale_reg]()
|
||||
{
|
||||
BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
|
||||
BitSet32 fprs(~3); // All except Q0/Q1
|
||||
|
||||
MOVI2R(X2, (u64)&m_quantizeTableS);
|
||||
ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
|
||||
float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
|
||||
float_emit.FMUL(32, D0, D0, D1);
|
||||
float_emit.FCVTZU(32, D0, D0);
|
||||
float_emit.XTN(16, D0, D0);
|
||||
};
|
||||
|
||||
TST(DecodeReg(addr_reg), 6, 1);
|
||||
FixupBranch argh = B(CC_NEQ);
|
||||
storeSingleU16 = GetCodePtr();
|
||||
emit_quantize();
|
||||
MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
|
||||
float_emit.REV16(8, D0, D0);
|
||||
float_emit.ST1(16, Q0, 0, addr_reg);
|
||||
RET(X30);
|
||||
|
||||
SetJumpTarget(argh);
|
||||
ABI_PushRegisters(gprs);
|
||||
float_emit.ABI_PushRegisters(fprs, X3);
|
||||
float_emit.UMOV(32, W0, Q0, 0);
|
||||
MOVI2R(X30, (u64)&PowerPC::Write_U16);
|
||||
BLR(X30);
|
||||
float_emit.ABI_PopRegisters(fprs, X3);
|
||||
ABI_PopRegisters(gprs);
|
||||
RET(X30);
|
||||
storeSingleU16Slow = GetCodePtr();
|
||||
emit_quantize();
|
||||
float_emit.UMOV(16, W0, Q0, 0);
|
||||
MOVI2R(X2, (u64)&PowerPC::Write_U16);
|
||||
BR(X2);
|
||||
}
|
||||
const u8* storeSingleS16 = GetCodePtr();
|
||||
const u8* storeSingleS16;
|
||||
const u8* storeSingleS16Slow;
|
||||
{
|
||||
auto emit_quantize = [this, &float_emit, scale_reg]()
|
||||
{
|
||||
BitSet32 gprs(GPR_CALLER_SAVE & ~7); // All except X0/X1/X2
|
||||
BitSet32 fprs(~3); // All except Q0/Q1
|
||||
|
||||
MOVI2R(X2, (u64)&m_quantizeTableS);
|
||||
ADD(scale_reg, X2, scale_reg, ArithOption(scale_reg, ST_LSL, 3));
|
||||
float_emit.LDR(32, INDEX_UNSIGNED, D1, scale_reg, 0);
|
||||
float_emit.FMUL(32, D0, D0, D1);
|
||||
float_emit.FCVTZS(32, D0, D0);
|
||||
float_emit.XTN(16, D0, D0);
|
||||
};
|
||||
|
||||
TST(DecodeReg(addr_reg), 6, 1);
|
||||
FixupBranch argh = B(CC_NEQ);
|
||||
storeSingleS16 = GetCodePtr();
|
||||
emit_quantize();
|
||||
MOVK(addr_reg, ((u64)Memory::logical_base >> 32) & 0xFFFF, SHIFT_32);
|
||||
float_emit.REV16(8, D0, D0);
|
||||
float_emit.ST1(16, Q0, 0, addr_reg);
|
||||
RET(X30);
|
||||
|
||||
SetJumpTarget(argh);
|
||||
ABI_PushRegisters(gprs);
|
||||
float_emit.ABI_PushRegisters(fprs, X3);
|
||||
float_emit.SMOV(32, W0, Q0, 0);
|
||||
MOVI2R(X30, (u64)&PowerPC::Write_U16);
|
||||
BLR(X30);
|
||||
float_emit.ABI_PopRegisters(fprs, X3);
|
||||
ABI_PopRegisters(gprs);
|
||||
RET(X30);
|
||||
storeSingleS16Slow = GetCodePtr();
|
||||
emit_quantize();
|
||||
float_emit.SMOV(16, W0, Q0, 0);
|
||||
MOVI2R(X2, (u64)&PowerPC::Write_U16);
|
||||
BR(X2);
|
||||
}
|
||||
|
||||
pairedStoreQuantized = reinterpret_cast<const u8**>(const_cast<u8*>(AlignCode16()));
|
||||
ReserveCodeSpace(16 * sizeof(u8*));
|
||||
ReserveCodeSpace(32 * sizeof(u8*));
|
||||
|
||||
// Fast
|
||||
pairedStoreQuantized[0] = storePairedFloat;
|
||||
pairedStoreQuantized[1] = storePairedIllegal;
|
||||
pairedStoreQuantized[2] = storePairedIllegal;
|
||||
@ -573,4 +528,24 @@ void JitArm64AsmRoutineManager::GenerateCommon()
|
||||
pairedStoreQuantized[13] = storeSingleU16;
|
||||
pairedStoreQuantized[14] = storeSingleS8;
|
||||
pairedStoreQuantized[15] = storeSingleS16;
|
||||
|
||||
// Slow
|
||||
pairedStoreQuantized[16] = storePairedFloatSlow;
|
||||
pairedStoreQuantized[17] = storePairedIllegal;
|
||||
pairedStoreQuantized[18] = storePairedIllegal;
|
||||
pairedStoreQuantized[19] = storePairedIllegal;
|
||||
pairedStoreQuantized[20] = storePairedU8Slow;
|
||||
pairedStoreQuantized[21] = storePairedU16Slow;
|
||||
pairedStoreQuantized[22] = storePairedS8Slow;
|
||||
pairedStoreQuantized[23] = storePairedS16Slow;
|
||||
|
||||
pairedStoreQuantized[24] = storeSingleFloatSlow;
|
||||
pairedStoreQuantized[25] = storePairedIllegal;
|
||||
pairedStoreQuantized[26] = storePairedIllegal;
|
||||
pairedStoreQuantized[27] = storePairedIllegal;
|
||||
pairedStoreQuantized[28] = storeSingleU8Slow;
|
||||
pairedStoreQuantized[29] = storeSingleU16Slow;
|
||||
pairedStoreQuantized[30] = storeSingleS8Slow;
|
||||
pairedStoreQuantized[31] = storeSingleS16Slow;
|
||||
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user