diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
index b8860eabf5..f1f8cddcd7 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FPUtils.h
@@ -11,6 +11,7 @@
 #include "Common/CommonTypes.h"
 #include "Common/FloatUtils.h"
 #include "Core/PowerPC/Gekko.h"
+#include "Core/PowerPC/Interpreter/ExceptionUtils.h"
 #include "Core/PowerPC/PowerPC.h"
 
 constexpr double PPC_NAN = std::numeric_limits<double>::quiet_NaN();
@@ -24,10 +25,18 @@ enum class FPCC
   FU = 1,  // ?
 };
 
+inline void CheckFPExceptions(UReg_FPSCR fpscr)
+{
+  if (fpscr.FEX && (MSR.FE0 || MSR.FE1))
+    GenerateProgramException(ProgramExceptionCause::FloatingPoint);
+}
+
 inline void UpdateFPExceptionSummary(UReg_FPSCR* fpscr)
 {
   fpscr->VX = (fpscr->Hex & FPSCR_VX_ANY) != 0;
   fpscr->FEX = ((fpscr->Hex >> 22) & (fpscr->Hex & FPSCR_ANY_E)) != 0;
+
+  CheckFPExceptions(*fpscr);
 }
 
 inline void SetFPException(UReg_FPSCR* fpscr, u32 mask)
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
index 50d586efa5..890fea99e6 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
@@ -167,6 +167,10 @@ void Interpreter::mtmsr(UGeckoInstruction inst)
   }
 
   MSR.Hex = rGPR[inst.RS];
+
+  // FE0/FE1 may have been set
+  CheckFPExceptions(FPSCR);
+
   PowerPC::CheckExceptions();
   m_end_block = true;
 }