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https://github.com/dolphin-emu/dolphin.git
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DSPTool: extract tests into a DSPAssemblyTest
- Moves all test code from DSPTool into UnitTests/Core/DSPAssemblyTest. - Converts test files (which could only be loaded if they were in the shell's working directory, so basically never) into C++ values. - Enables most of the commented-out tests. - Removes non-deterministic random code test.
This commit is contained in:
Michael Maltese
@ -39,192 +39,7 @@ void DSP::Host::UpdateDebugger()
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{
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}
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static bool RoundTrippableDissassemble(const std::vector<u16>& code, std::string& text)
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{
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DSP::AssemblerSettings settings;
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settings.ext_separator = '\'';
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settings.decode_names = true;
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settings.decode_registers = true;
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// These two prevent roundtripping.
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settings.show_hex = false;
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settings.show_pc = false;
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DSP::DSPDisassembler disasm(settings);
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return disasm.Disassemble(0x0000, code, 0x0000, text);
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}
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// This test goes from text ASM to binary to text ASM and once again back to binary.
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// Then the two binaries are compared.
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static bool RoundTrip(const std::vector<u16>& code1)
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{
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std::vector<u16> code2;
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std::string text;
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if (!RoundTrippableDissassemble(code1, text))
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{
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printf("RoundTrip: Disassembly failed.\n");
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return false;
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}
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if (!DSP::Assemble(text, code2))
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{
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printf("RoundTrip: Assembly failed.\n");
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return false;
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}
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if (!DSP::Compare(code1, code2))
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{
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DSP::Disassemble(code1, true, text);
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printf("%s", text.c_str());
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}
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return true;
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}
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// This test goes from text ASM to binary to text ASM and once again back to binary.
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// Very convenient for testing. Then the two binaries are compared.
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static bool SuperTrip(const char* asm_code)
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{
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std::vector<u16> code1, code2;
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std::string text;
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if (!DSP::Assemble(asm_code, code1))
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{
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printf("SuperTrip: First assembly failed\n");
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return false;
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}
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printf("First assembly: %i words\n", (int)code1.size());
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if (!RoundTrippableDissassemble(code1, text))
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{
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printf("SuperTrip: Disassembly failed\n");
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return false;
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}
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else
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{
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printf("Disass:\n");
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printf("%s", text.c_str());
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}
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if (!DSP::Assemble(text, code2))
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{
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printf("SuperTrip: Second assembly failed\n");
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return false;
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}
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/*
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std::string text2;
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Disassemble(code1, true, &text1);
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Disassemble(code2, true, &text2);
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File::WriteStringToFile(text1, "code1.txt");
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File::WriteStringToFile(text2, "code2.txt");
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*/
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return true;
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}
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static void RunAsmTests()
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{
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bool fail = false;
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#define CHK(a) \
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if (!SuperTrip(a)) \
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printf("FAIL\n%s\n", a), fail = true;
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// Let's start out easy - a trivial instruction..
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CHK(" NOP\n");
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// Now let's do several.
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CHK(" NOP\n"
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" NOP\n"
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" NOP\n");
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// Turning it up a notch.
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CHK(" SET16\n"
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" SET40\n"
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" CLR15\n"
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" M0\n"
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" M2\n");
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// Time to try labels and parameters, and comments.
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CHK("DIRQ_TEST: equ 0xfffb ; DSP Irq Request\n"
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" si @0xfffc, #0x8888\n"
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" si @0xfffd, #0xbeef\n"
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" si @DIRQ_TEST, #0x0001\n");
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// Let's see if registers roundtrip. Also try predefined labels.
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CHK(" si @0xfffc, #0x8888\n"
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" si @0xfffd, #0xbeef\n"
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" si @DIRQ, #0x0001\n");
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// Let's try some messy extended instructions.
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// CHK(" MULMV'SN $AX0.L, $AX0.H, $ACC0 : @$AR2, $AC1.M\n");
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//" ADDAXL'MV $ACC1, $AX1.L : $AX1.H, $AC1.M\n");
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// Let's get brutal. We generate random code bytes and make sure that they can
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// be roundtripped. We don't expect it to always succeed but it'll be sure to generate
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// interesting test cases.
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/*
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std::vector<u16> hermes;
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if (!LoadBinary("testdata/hermes.bin", &hermes))
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PanicAlert("Failed to load hermes rom");
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RoundTrip(hermes);
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*/
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/*
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std::vector<u16> code;
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std::string text_orig;
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File::ReadFileToString("testdata/dsp_test.S", &text_orig);
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if (!Assemble(text_orig.c_str(), &code))
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{
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printf("SuperTrip: First assembly failed\n");
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return;
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}*/
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/*
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{
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std::vector<u16> code;
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code.clear();
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for (int i = 0; i < sizeof(dsp_test)/4; i++)
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{
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code.push_back(dsp_test[i] >> 16);
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code.push_back(dsp_test[i] & 0xFFFF);
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}
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SaveBinary(code, "dsp_test2.bin");
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RoundTrip(code);
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}*/
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// if (Compare(code, hermes))
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// printf("Successs\n");
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/*
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{
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std::vector<u16> code;
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std::string text;
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LoadBinary("testdata/dsp_test.bin", &code);
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Disassemble(code, true, &text);
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Assemble(text.c_str(), &code);
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Disassemble(code, true, &text);
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printf("%s", text.c_str());
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}*/
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/*
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puts("Insane Random Code Test\n");
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std::vector<u16> rand_code;
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GenRandomCode(30, &rand_code);
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std::string rand_code_text;
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Disassemble(rand_code, true, &rand_code_text);
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printf("%s", rand_code_text.c_str());
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RoundTrip(rand_code);
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if (File::ReadFileToString("C:/devkitPro/examples/wii/asndlib/dsptest/dsp_test.ds", &dsp_test))
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SuperTrip(dsp_test.c_str());
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//.File::ReadFileToString("C:/devkitPro/trunk/libogc/libasnd/dsp_mixer/dsp_mixer.s", &dsp_test);
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// This is CLOSE to working. Sorry about the local path btw. This is preliminary code.
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*/
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std::string dsp_test;
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if (File::ReadFileToString("Testdata/dsp_test.s", dsp_test))
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fail = fail || !SuperTrip(dsp_test.c_str());
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if (!fail)
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printf("All passed!\n");
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}
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// Usage:
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// Run internal tests:
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// dsptool test
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// Disassemble a file:
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// dsptool -d -o asdf.txt asdf.bin
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// Disassemble a file, output to standard output:
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@ -235,7 +50,6 @@ static void RunAsmTests()
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// dsptool [-f] -h asdf.h asdf.txt
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// Print results from DSPSpy register dump
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// dsptool -p dsp_dump0.bin
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// So far, all this binary can do is test partially that itself works correctly.
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int main(int argc, const char* argv[])
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{
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if (argc == 1 || (argc == 2 && (!strcmp(argv[1], "--help") || (!strcmp(argv[1], "-?")))))
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@ -258,12 +72,6 @@ int main(int argc, const char* argv[])
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return 0;
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}
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if (argc == 2 && !strcmp(argv[1], "test"))
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{
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RunAsmTests();
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return 0;
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}
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std::string input_name;
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std::string output_header_name;
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std::string output_name;
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@ -1,639 +0,0 @@
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DSCR: equ 0xffc9 ; DSP DMA Control Reg
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DSBL: equ 0xffcb ; DSP DMA Block Length
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DSPA: equ 0xffcd ; DSP DMA DMEM Address
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DSMAH: equ 0xffce ; DSP DMA Mem Address H
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DSMAL: equ 0xffcf ; DSP DMA Mem Address L
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ACSAH: equ 0xffd4
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ACSAL: equ 0xffd5
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ACEAH: equ 0xffd6
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ACEAL: equ 0xffd7
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ACCAH: equ 0xffd8
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ACCAL: equ 0xffd9
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AMDM: equ 0xffef ; ARAM DMA Request Mask
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DIRQ: equ 0xfffb ; DSP Irq Request
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DMBH: equ 0xfffc ; DSP Mailbox H
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DMBL: equ 0xfffd ; DSP Mailbox L
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CMBH: equ 0xfffe ; CPU Mailbox H
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CMBL: equ 0xffff ; CPU Mailbox L
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R00: equ 0x00
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R01: equ 0x01
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R02: equ 0x02
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R03: equ 0x03
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R04: equ 0x04
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R05: equ 0x05
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R06: equ 0x06
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R07: equ 0x07
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R08: equ 0x08
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R09: equ 0x09
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R0A: equ 0x0a
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R0B: equ 0x0b
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R0C: equ 0x0c
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R0D: equ 0x0d
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R0E: equ 0x0e
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R0F: equ 0x0f
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R10: equ 0x10
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R11: equ 0x11
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R12: equ 0x12
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R13: equ 0x13
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R14: equ 0x14
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R15: equ 0x15
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R16: equ 0x16
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R17: equ 0x17
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R18: equ 0x18
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R19: equ 0x19
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R1A: equ 0x1a
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R1B: equ 0x1b
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R1C: equ 0x1c
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R1D: equ 0x1d
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R1E: equ 0x1e
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R1F: equ 0x1f
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ACH0: equ 0x10
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ACH1: equ 0x11
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ACL0: equ 0x1e
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ACL1: equ 0x1f
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DSP_CR_IMEM: equ 2
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DSP_CR_TO_CPU: equ 1
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REGS_BASE: equ 0x0f80
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MEM_HI: equ 0x0f7E
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MEM_LO: equ 0x0f7F
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; Interrupt vectors 8 vectors, 2 opcodes each
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jmp irq0
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jmp irq1
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jmp irq2
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jmp irq3
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jmp irq4
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jmp irq5
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jmp irq6
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jmp irq7
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; Main code at 0x10
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CW 0x1302
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CW 0x1303
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CW 0x1204
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CW 0x1305
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CW 0x1306
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s40
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lri $r12, #0x00ff
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main:
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cw 0x8900
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cw 0x8100
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; get address of memory dump and copy it
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xdead
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si @DIRQ, #0x0001
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call wait_for_cpu_mbox
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lrs $ACL0, @CMBL
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andi $acl1, #0x7fff
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sr @MEM_HI, $ACL1
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sr @MEM_LO, $ACL0
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lri $r18, #0
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lri $r19, #0 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $r1a, #0x2000
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lr $r1c, @MEM_HI
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lr $r1e, @MEM_LO
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call do_dma
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; get address of registers and DMA them to memory
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call wait_for_dsp_mbox
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si @DMBH, #0x8888
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si @DMBL, #0xbeef
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si @DIRQ, #0x0001
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call wait_for_cpu_mbox
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lrs $ACL0, @CMBL
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andi $acl1, #0x7fff
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sr @MEM_HI, $ACL1
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sr @MEM_LO, $ACL0
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lri $r18, #REGS_BASE
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lri $r19, #0 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $r1a, #0x80
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lr $r1c, @MEM_HI
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lr $r1e, @MEM_LO
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call do_dma
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lri $r00, #REGS_BASE+1
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lrri $r01, @$r00
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lrri $r02, @$r00
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lrri $r03, @$r00
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lrri $r04, @$r00
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lrri $r05, @$r00
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lrri $r06, @$r00
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lrri $r07, @$r00
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lrri $r08, @$r00
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lrri $r09, @$r00
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lrri $r0a, @$r00
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lrri $r0b, @$r00
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lrri $r0c, @$r00
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lrri $r0d, @$r00
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lrri $r0e, @$r00
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lrri $r0f, @$r00
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lrri $r10, @$r00
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lrri $r11, @$r00
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lrri $r12, @$r00
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lrri $r13, @$r00
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lrri $r14, @$r00
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lrri $r15, @$r00
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lrri $r16, @$r00
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lrri $r17, @$r00
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lrri $r18, @$r00
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lrri $r19, @$r00
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lrri $r1a, @$r00
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lrri $r1b, @$r00
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lrri $r1c, @$r00
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lrri $r1d, @$r00
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lrri $r1e, @$r00
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lrri $r1f, @$r00
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lr $r00, @REGS_BASE
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nop
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nop
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nop
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nop
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cw 0x8600
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call send_back
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JMP ende
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; call dump_memory
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; call send_back
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; 0x041e
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;
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cw 0x00de
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cw 0x03f1
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call send_back
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cw 0x0200
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cw 0x0a60
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call send_back
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cw 0x1c7e
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call send_back
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cw 0x8100
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call send_back
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cw 0x8900
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call send_back
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cw 0x009f
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cw 0x00a0
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call send_back
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cw 0x00de
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cw 0x03f1
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call send_back
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cw 0x5d00
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call send_back
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cw 0x0e50
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call send_back
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cw 0x0750
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call send_back
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cw 0x0270
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call send_back
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cw 0x5d00
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call send_back
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cw 0x00da
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cw 0x03f2
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call send_back
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cw 0x8600
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call send_back
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JGE g_0c4d
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; cw 0x0290
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; cw 0x0c4d
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; call send_back JX0
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cw 0x00de
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cw 0x03f3
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call send_back
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cw 0x5c00
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call send_back
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JLE g_0c38
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; cw 0x0293
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; cw 0x0c38 JX3
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; call send_back
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JMP g_0c52
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; cw 0x029f
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; cw 0x0c52
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; call send_back
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g_0c38:
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cw 0x00db
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cw 0x03f7
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call send_back
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cw 0x009e
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cw 0x8000
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call send_back
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cw 0x4600
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call send_back
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JMP g_0c44
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; cw 0x029f
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; cw 0x0c44
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; call send_back
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g_0c3f:
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cw 0x00db
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cw 0x03f7
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call send_back
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cw 0x009e
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cw 0x8000
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call send_back
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cw 0x5600
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call send_back
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g_0c44:
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cw 0x00fe
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cw 0x03f5
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call send_back
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|
||||
cw 0x1fda
|
||||
call send_back
|
||||
|
||||
cw 0x7c00
|
||||
call send_back
|
||||
|
||||
cw 0x1f5e
|
||||
call send_back
|
||||
|
||||
cw 0x00fe
|
||||
cw 0x03f2
|
||||
call send_back
|
||||
|
||||
JMP g_0c52
|
||||
; cw 0x029f
|
||||
; cw 0x0c52
|
||||
; call send_back
|
||||
|
||||
g_0c4d:
|
||||
|
||||
cw 0x00de
|
||||
cw 0x03f4
|
||||
call send_back
|
||||
|
||||
cw 0x5d00
|
||||
call send_back
|
||||
|
||||
JLE g_0c3f
|
||||
; cw 0x0293
|
||||
; cw 0x0c3f
|
||||
; call send_back
|
||||
|
||||
g_0c52:
|
||||
cw 0x8900
|
||||
call send_back
|
||||
|
||||
cw 0x00dd
|
||||
cw 0x03f5
|
||||
call send_back
|
||||
|
||||
cw 0x1501
|
||||
call send_back
|
||||
|
||||
cw 0x8100
|
||||
call send_back
|
||||
|
||||
cw 0x00dc
|
||||
cw 0x03f6
|
||||
call send_back
|
||||
|
||||
cw 0x008b
|
||||
cw 0x009f
|
||||
call send_back
|
||||
|
||||
cw 0x0080
|
||||
cw 0x0a00
|
||||
call send_back
|
||||
|
||||
cw 0x0900
|
||||
call send_back
|
||||
|
||||
BLOOPI #0x50, g_0c65
|
||||
; cw 0x1150
|
||||
; cw 0x0c65
|
||||
; call send_back
|
||||
|
||||
|
||||
cw 0x1878
|
||||
call send_back
|
||||
|
||||
cw 0x4c00
|
||||
call send_back
|
||||
|
||||
cw 0x1cfe
|
||||
call send_back
|
||||
|
||||
cw 0x001f
|
||||
call send_back
|
||||
|
||||
cw 0x1fd9
|
||||
call send_back
|
||||
g_0c65:
|
||||
cw 0x1b18
|
||||
call send_back
|
||||
|
||||
cw 0x009f
|
||||
cw 0x0a60
|
||||
call send_back
|
||||
|
||||
cw 0x1fc3
|
||||
call send_back
|
||||
|
||||
cw 0x5c00
|
||||
call send_back
|
||||
|
||||
cw 0x00fe
|
||||
cw 0x03f1
|
||||
call send_back
|
||||
|
||||
cw 0x00fc
|
||||
cw 0x03f6
|
||||
call send_back
|
||||
|
||||
cw 0x008b
|
||||
cw 0xffff
|
||||
call send_back
|
||||
|
||||
|
||||
|
||||
ende:
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
|
||||
|
||||
dead_loop:
|
||||
jmp dead_loop
|
||||
|
||||
do_dma:
|
||||
sr @DSMAH, $r1c
|
||||
sr @DSMAL, $r1e
|
||||
sr @DSPA, $r18
|
||||
sr @DSCR, $r19
|
||||
sr @DSBL, $r1a
|
||||
wait_dma:
|
||||
LRS $ACL1, @DSCR
|
||||
andcf $acl1, #0x0004
|
||||
JLZ wait_dma
|
||||
RET
|
||||
|
||||
|
||||
wait_for_dsp_mbox:
|
||||
lrs $ACL1, @DMBH
|
||||
andcf $acl1, #0x8000
|
||||
jlz wait_for_dsp_mbox
|
||||
ret
|
||||
|
||||
wait_for_cpu_mbox:
|
||||
lrs $ACL1, @cmbh
|
||||
andcf $acl1, #0x8000
|
||||
jlnz wait_for_cpu_mbox
|
||||
ret
|
||||
|
||||
irq0:
|
||||
lri $acl0, #0x0000
|
||||
jmp irq
|
||||
irq1:
|
||||
lri $acl0, #0x0001
|
||||
jmp irq
|
||||
irq2:
|
||||
lri $acl0, #0x0002
|
||||
jmp irq
|
||||
|
||||
irq3:
|
||||
lri $acl0, #0x0003
|
||||
jmp irq
|
||||
irq4:
|
||||
lri $acl0, #0x0004
|
||||
jmp irq
|
||||
irq5:
|
||||
; jmp finale
|
||||
s40
|
||||
mrr $r0d, $r1c
|
||||
mrr $r0d, $r1e
|
||||
clr $acc0
|
||||
mrr $r1e, $r0d
|
||||
mrr $r1c, $r0d
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
rti
|
||||
|
||||
lri $acl0, #0x0005
|
||||
jmp irq
|
||||
irq6:
|
||||
lri $acl0, #0x0006
|
||||
jmp irq
|
||||
irq7:
|
||||
lri $acl0, #0x0007
|
||||
jmp irq
|
||||
|
||||
irq:
|
||||
lrs $ACL1, @DMBH
|
||||
andcf $acl1, #0x8000
|
||||
jlz irq
|
||||
si @DMBH, #0x8BAD
|
||||
sr @DMBL, $r0b
|
||||
;sr @DMBL, $acl0
|
||||
si @DIRQ, #0x0001
|
||||
halt
|
||||
|
||||
|
||||
|
||||
|
||||
send_back:
|
||||
|
||||
; store registers to reg table
|
||||
sr @REGS_BASE, $r00
|
||||
lri $r00, #(REGS_BASE + 1)
|
||||
srri @$r00, $r01
|
||||
srri @$r00, $r02
|
||||
srri @$r00, $r03
|
||||
srri @$r00, $r04
|
||||
srri @$r00, $r05
|
||||
srri @$r00, $r06
|
||||
srri @$r00, $r07
|
||||
srri @$r00, $r08
|
||||
srri @$r00, $r09
|
||||
srri @$r00, $r0a
|
||||
srri @$r00, $r0b
|
||||
srri @$r00, $r0c
|
||||
srri @$r00, $r0d
|
||||
srri @$r00, $r0e
|
||||
srri @$r00, $r0f
|
||||
srri @$r00, $r10
|
||||
srri @$r00, $r11
|
||||
srri @$r00, $r12
|
||||
srri @$r00, $r13
|
||||
srri @$r00, $r14
|
||||
srri @$r00, $r15
|
||||
srri @$r00, $r16
|
||||
srri @$r00, $r17
|
||||
srri @$r00, $r18
|
||||
srri @$r00, $r19
|
||||
srri @$r00, $r1a
|
||||
srri @$r00, $r1b
|
||||
srri @$r00, $r1c
|
||||
srri @$r00, $r1d
|
||||
srri @$r00, $r1e
|
||||
srri @$r00, $r1f
|
||||
|
||||
|
||||
lri $r18, #0x0000
|
||||
lri $r19, #1 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
|
||||
lri $r1a, #0x200
|
||||
lr $r1c, @MEM_HI
|
||||
lr $r1e, @MEM_LO
|
||||
|
||||
lri $r01, #8+8
|
||||
|
||||
bloop $r01, dma_copy
|
||||
call do_dma
|
||||
addi $r1e, #0x200
|
||||
mrr $r1f, $r18
|
||||
addi $r1f, #0x100
|
||||
mrr $r18, $r1f
|
||||
nop
|
||||
dma_copy:
|
||||
nop
|
||||
|
||||
call wait_for_dsp_mbox
|
||||
si @DMBH, #0x8888
|
||||
si @DMBL, #0xfeeb
|
||||
si @DIRQ, #0x0001
|
||||
|
||||
; wait for answer before we execute the next op
|
||||
call wait_for_cpu_mbox
|
||||
lrs $ACL0, @CMBL
|
||||
andi $acl1, #0x7fff
|
||||
|
||||
|
||||
|
||||
lri $r00, #REGS_BASE+1
|
||||
lrri $r01, @$r00
|
||||
lrri $r02, @$r00
|
||||
lrri $r03, @$r00
|
||||
lrri $r04, @$r00
|
||||
lrri $r05, @$r00
|
||||
lrri $r06, @$r00
|
||||
lrri $r07, @$r00
|
||||
lrri $r08, @$r00
|
||||
lrri $r09, @$r00
|
||||
lrri $r0a, @$r00
|
||||
lrri $r0b, @$r00
|
||||
lrri $r0c, @$r00
|
||||
lrri $r0d, @$r00
|
||||
lrri $r0e, @$r00
|
||||
lrri $r0f, @$r00
|
||||
lrri $r10, @$r00
|
||||
lrri $r11, @$r00
|
||||
lrri $r12, @$r00
|
||||
lrri $r13, @$r00
|
||||
lrri $r14, @$r00
|
||||
lrri $r15, @$r00
|
||||
lrri $r16, @$r00
|
||||
lrri $r17, @$r00
|
||||
lrri $r18, @$r00
|
||||
lrri $r19, @$r00
|
||||
lrri $r1a, @$r00
|
||||
lrri $r1b, @$r00
|
||||
lrri $r1c, @$r00
|
||||
lrri $r1d, @$r00
|
||||
lrri $r1e, @$r00
|
||||
lrri $r1f, @$r00
|
||||
lr $r00, @REGS_BASE
|
||||
|
||||
ret
|
||||
|
||||
send_back_16:
|
||||
|
||||
cw 0x8e00
|
||||
call send_back
|
||||
cw 0x8f00
|
||||
|
||||
ret
|
||||
|
||||
|
||||
dump_memory:
|
||||
|
||||
lri $r02, #0x0000
|
||||
lri $acl0, #0x1000
|
||||
|
||||
lri $r01, #0x1000
|
||||
bloop $r01, _fill_loop2
|
||||
|
||||
mrr $r03, $acl0
|
||||
cw 0x80f0
|
||||
|
||||
mrr $r1f, $r00
|
||||
mrr $r00, $r02
|
||||
srri @$r00, $r1b
|
||||
mrr $r02, $r00
|
||||
mrr $r00, $r1f
|
||||
|
||||
addis $AC0.M, #0x1
|
||||
|
||||
_fill_loop2:
|
||||
nop
|
||||
|
||||
|
||||
ret
|
||||
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user