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https://github.com/dolphin-emu/dolphin.git
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Merge cd027f4091
into 80ea68b13c
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commit
895045db66
@ -565,8 +565,6 @@ void JitArm64::fctiwx(UGeckoInstruction inst)
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if (single)
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{
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const auto V0 = fpr.GetScopedReg();
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if (is_fctiwzx)
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{
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m_float_emit.FCVTS(EncodeRegToSingle(VD), EncodeRegToSingle(VB), RoundingMode::Z);
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@ -577,11 +575,8 @@ void JitArm64::fctiwx(UGeckoInstruction inst)
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m_float_emit.FCVTS(EncodeRegToSingle(VD), EncodeRegToSingle(VD), RoundingMode::Z);
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}
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// Generate 0xFFF8'0000'0000'0000ULL
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m_float_emit.MOVI(64, EncodeRegToDouble(V0), 0xFFFF'0000'0000'0000ULL);
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m_float_emit.BIC(16, EncodeRegToDouble(V0), 0x7);
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m_float_emit.ORR(EncodeRegToDouble(VD), EncodeRegToDouble(VD), EncodeRegToDouble(V0));
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m_float_emit.INS(32, EncodeRegToDouble(VD), 1,
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EncodeRegToDouble(FPR_CONSTANT_FFF8_0000_3F80_0000), 1);
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}
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else
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{
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@ -796,9 +791,8 @@ void JitArm64::ConvertSingleToDoublePair(size_t guest_reg, ARM64Reg dest_reg, AR
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{
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// Set each 32-bit element of scratch_reg to 0x0000'0000 or 0xFFFF'FFFF depending on whether
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// the absolute value of the corresponding element in src_reg compares greater than 0
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m_float_emit.MOVI(64, EncodeRegToDouble(scratch_reg), 0);
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m_float_emit.FACGT(32, EncodeRegToDouble(scratch_reg), EncodeRegToDouble(src_reg),
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EncodeRegToDouble(scratch_reg));
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EncodeRegToDouble(FPR_CONSTANT_0000_0000_0000_0000));
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// 0x0000'0000'0000'0000 (zero) -> 0x0000'0000'0000'0000 (zero)
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// 0x0000'0000'FFFF'FFFF (denormal) -> 0xFF00'0000'FFFF'FFFF (normal)
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@ -120,8 +120,8 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
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if (w)
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{
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m_float_emit.FMOV(ARM64Reg::S0, 0x70); // 1.0 as a Single
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m_float_emit.INS(32, VS, 1, ARM64Reg::Q0, 0);
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// Set ps1 to 1.0
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m_float_emit.INS(32, VS, 1, FPR_CONSTANT_FFF8_0000_3F80_0000, 0);
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}
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const ARM64Reg VS_again = fpr.RW(inst.RS, RegType::Single, true);
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@ -727,8 +727,6 @@ void Arm64FPRCache::GetAllocationOrder()
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ARM64Reg::Q11,
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ARM64Reg::Q12,
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ARM64Reg::Q13,
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ARM64Reg::Q14,
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ARM64Reg::Q15,
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// Caller saved
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ARM64Reg::Q16,
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@ -25,6 +25,10 @@ constexpr Arm64Gen::ARM64Reg PPC_REG = Arm64Gen::ARM64Reg::X29;
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// PC register when calling the dispatcher
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constexpr Arm64Gen::ARM64Reg DISPATCHER_PC = Arm64Gen::ARM64Reg::W26;
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// FPR constants
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constexpr Arm64Gen::ARM64Reg FPR_CONSTANT_0000_0000_0000_0000 = Arm64Gen::ARM64Reg::Q14;
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constexpr Arm64Gen::ARM64Reg FPR_CONSTANT_FFF8_0000_3F80_0000 = Arm64Gen::ARM64Reg::Q15;
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#ifdef __GNUC__
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#define PPCSTATE_OFF(elem) \
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([]() consteval { \
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@ -44,6 +44,11 @@ void JitArm64::GenerateAsm()
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ABI_PushRegisters(regs_to_save);
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m_float_emit.ABI_PushRegisters(regs_to_save_fpr, ARM64Reg::X8);
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// Generate FPR constants
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m_float_emit.MOVI(8, EncodeRegToDouble(FPR_CONSTANT_0000_0000_0000_0000), 0);
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MOVI2R(ARM64Reg::X30, 0xFFF8'0000'3F80'0000ULL);
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m_float_emit.FMOV(EncodeRegToDouble(FPR_CONSTANT_FFF8_0000_3F80_0000), ARM64Reg::X30);
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MOVP2R(PPC_REG, &m_ppc_state);
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// Store the stack pointer, so we can reset it if the BLR optimization fails.
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