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ArmEmitter: Merge AddI2R helpers.
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degasus
parent
694e9b4132
commit
8ad98d0046
@ -4149,141 +4149,115 @@ void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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}
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}
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void ARM64XEmitter::ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool negative, bool flags,
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ARM64Reg scratch)
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{
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auto addi = [this](ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool shift, bool negative, bool flags) {
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switch ((negative << 1) | flags)
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{
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case 0:
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ADD(Rd, Rn, imm, shift);
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break;
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case 1:
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ADDS(Rd, Rn, imm, shift);
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break;
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case 2:
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SUB(Rd, Rn, imm, shift);
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break;
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case 3:
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SUBS(Rd, Rn, imm, shift);
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break;
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}
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};
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bool has_scratch = scratch != INVALID_REG;
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u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
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bool neg_neg = negative ? false : true;
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// Fast paths, aarch64 immediate instructions
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// Try them all first
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if (imm <= 0xFFF)
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{
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addi(Rd, Rn, imm, false, negative, flags);
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return;
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}
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if (imm <= 0xFFFFFF && (imm & 0xFFF) == 0)
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{
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addi(Rd, Rn, imm >> 12, true, negative, flags);
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return;
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}
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if (imm_neg <= 0xFFF)
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{
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addi(Rd, Rn, imm_neg, false, neg_neg, flags);
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return;
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}
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if (imm_neg <= 0xFFFFFF && (imm_neg & 0xFFF) == 0)
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{
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addi(Rd, Rn, imm_neg >> 12, true, neg_neg, flags);
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return;
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}
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// ADD+ADD is slower than MOVK+ADD, but inplace.
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// But it supports a few more bits, so use it to avoid MOVK+MOVK+ADD.
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// As this splits the addition in two parts, this must not be done on setting flags.
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if (!flags && (imm >= 0x10000u || !has_scratch) && imm < 0x1000000u)
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{
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addi(Rd, Rn, imm & 0xFFF, false, negative, false);
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addi(Rd, Rd, imm >> 12, true, negative, false);
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return;
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}
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if (!flags && (imm_neg >= 0x10000u || !has_scratch) && imm_neg < 0x1000000u)
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{
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addi(Rd, Rn, imm_neg & 0xFFF, false, neg_neg, false);
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addi(Rd, Rd, imm_neg >> 12, true, neg_neg, false);
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return;
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}
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_assert_msg_(DYNA_REC, has_scratch,
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"ADDI2R - failed to construct arithmetic immediate value from %08x, need scratch",
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(u32)imm);
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negative ^= MOVI2R2(scratch, imm, imm_neg);
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switch ((negative << 1) | flags)
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{
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case 0:
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ADD(Rd, Rn, scratch);
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break;
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case 1:
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ADDS(Rd, Rn, scratch);
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break;
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case 2:
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SUB(Rd, Rn, scratch);
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break;
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case 3:
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SUBS(Rd, Rn, scratch);
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break;
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}
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}
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void ARM64XEmitter::ADDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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u32 val;
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bool shift;
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u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
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if (IsImmArithmetic(imm, &val, &shift))
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{
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ADD(Rd, Rn, val, shift);
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}
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else if (IsImmArithmetic(imm_neg, &val, &shift))
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{
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SUB(Rd, Rn, val, shift);
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}
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else if ((imm >= 0x10000u || scratch == INVALID_REG) && imm < 0x1000000u)
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{
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ADD(Rd, Rn, imm & 0xFFF, false);
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ADD(Rd, Rd, imm >> 12, true);
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}
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else if ((imm_neg >= 0x10000u || scratch == INVALID_REG) && imm_neg < 0x1000000u)
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{
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SUB(Rd, Rn, imm_neg & 0xFFF, false);
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SUB(Rd, Rd, imm_neg >> 12, true);
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}
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else
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{
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_assert_msg_(DYNA_REC, scratch != INVALID_REG,
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"ADDI2R - failed to construct arithmetic immediate value from %08x, need scratch",
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(u32)imm);
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if (MOVI2R2(scratch, imm, imm_neg))
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SUB(Rd, Rn, scratch);
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else
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ADD(Rd, Rn, scratch);
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}
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ADDI2R_internal(Rd, Rn, imm, false, false, scratch);
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}
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void ARM64XEmitter::ADDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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u32 val;
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bool shift;
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u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
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if (IsImmArithmetic(imm, &val, &shift))
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{
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ADDS(Rd, Rn, val, shift);
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}
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else if (IsImmArithmetic(imm_neg, &val, &shift))
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{
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SUBS(Rd, Rn, val, shift);
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}
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else
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{
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_assert_msg_(DYNA_REC, scratch != INVALID_REG,
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"ADDSI2R - failed to construct arithmetic immediate value from %08x, need scratch",
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(u32)imm);
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if (MOVI2R2(scratch, imm, imm_neg))
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SUBS(Rd, Rn, scratch);
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else
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ADDS(Rd, Rn, scratch);
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}
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ADDI2R_internal(Rd, Rn, imm, false, true, scratch);
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}
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void ARM64XEmitter::SUBI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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u32 val;
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bool shift;
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u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
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if (IsImmArithmetic(imm, &val, &shift))
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{
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SUB(Rd, Rn, val, shift);
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}
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else if (IsImmArithmetic(imm_neg, &val, &shift))
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{
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ADD(Rd, Rn, val, shift);
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}
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else if ((imm >= 0x10000u || scratch == INVALID_REG) && imm < 0x1000000u)
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{
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SUB(Rd, Rn, imm & 0xFFF, false);
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SUB(Rd, Rd, imm >> 12, true);
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}
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else if ((imm_neg >= 0x10000u || scratch == INVALID_REG) && imm_neg < 0x1000000u)
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{
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ADD(Rd, Rn, imm_neg & 0xFFF, false);
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ADD(Rd, Rd, imm_neg >> 12, true);
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}
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else
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{
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_assert_msg_(DYNA_REC, scratch != INVALID_REG,
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"SUBI2R - failed to construct arithmetic immediate value from %08x, need scratch",
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(u32)imm);
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if (MOVI2R2(scratch, imm, imm_neg))
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ADD(Rd, Rn, scratch);
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else
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SUB(Rd, Rn, scratch);
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}
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ADDI2R_internal(Rd, Rn, imm, true, false, scratch);
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}
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void ARM64XEmitter::SUBSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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u32 val;
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bool shift;
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u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
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if (IsImmArithmetic(imm, &val, &shift))
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{
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SUBS(Rd, Rn, val, shift);
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}
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else if (IsImmArithmetic(imm_neg, &val, &shift))
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{
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ADDS(Rd, Rn, val, shift);
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}
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else
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{
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_assert_msg_(DYNA_REC, scratch != INVALID_REG,
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"ANDSI2R - failed to construct immediate value from %08x, need scratch", (u32)imm);
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if (MOVI2R2(scratch, imm, imm_neg))
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ADDS(Rd, Rn, scratch);
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else
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SUBS(Rd, Rn, scratch);
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}
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ADDI2R_internal(Rd, Rn, imm, true, true, scratch);
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}
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void ARM64XEmitter::CMPI2R(ARM64Reg Rn, u64 imm, ARM64Reg scratch)
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{
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u32 val;
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bool shift;
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if (IsImmArithmetic(imm, &val, &shift))
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{
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CMP(Rn, val, shift);
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}
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else
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{
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_assert_msg_(DYNA_REC, scratch != INVALID_REG,
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"CMPI2R - failed to construct arithmetic immediate value from %08x, need scratch",
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(u32)imm);
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MOVI2R(scratch, imm);
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CMP(Rn, scratch);
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}
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ADDI2R_internal(Is64Bit(Rn) ? ZR : WZR, Rn, imm, true, true, scratch);
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}
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bool ARM64XEmitter::TryADDI2R(ARM64Reg Rd, ARM64Reg Rn, u32 imm)
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@ -855,6 +855,8 @@ public:
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void EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch = INVALID_REG);
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void CMPI2R(ARM64Reg Rn, u64 imm, ARM64Reg scratch = INVALID_REG);
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void ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool negative, bool flags,
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ARM64Reg scratch);
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void ADDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch = INVALID_REG);
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void ADDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch = INVALID_REG);
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void SUBI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch = INVALID_REG);
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