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PowerPC: Parametrize MMCR1 macro.

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This commit is contained in:
Admiral H. Curtiss 2023-01-09 21:00:41 +01:00
parent 126590c4cd
commit 8bab3ac755
No known key found for this signature in database
GPG Key ID: F051B4C4044F33FB
4 changed files with 5 additions and 5 deletions
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2
Source/Core/Core/PowerPC/Jit64/Jit.cpp
View File

@ -534,7 +534,7 @@ bool Jit64::Cleanup()
}
// SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
if (MMCR0(PowerPC::ppcState).Hex || MMCR1.Hex)
if (MMCR0(PowerPC::ppcState).Hex || MMCR1(PowerPC::ppcState).Hex)
{
ABI_PushRegistersAndAdjustStack({}, 0);
ABI_CallFunctionCCC(PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst,

2
Source/Core/Core/PowerPC/JitArm64/Jit.cpp
View File

@ -288,7 +288,7 @@ void JitArm64::Cleanup()
}
// SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
if (MMCR0(PowerPC::ppcState).Hex || MMCR1.Hex)
if (MMCR0(PowerPC::ppcState).Hex || MMCR1(PowerPC::ppcState).Hex)
{
MOVP2R(ARM64Reg::X8, &PowerPC::UpdatePerformanceMonitor);
MOVI2R(ARM64Reg::X0, js.downcountAmount);

4
Source/Core/Core/PowerPC/PowerPC.cpp
View File

@ -430,7 +430,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
break;
}
switch (MMCR1.PMC3SELECT)
switch (MMCR1(PowerPC::ppcState).PMC3SELECT)
{
case 0: // No change
break;
@ -444,7 +444,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
break;
}
switch (MMCR1.PMC4SELECT)
switch (MMCR1(PowerPC::ppcState).PMC4SELECT)
{
case 0: // No change
break;

2
Source/Core/Core/PowerPC/PowerPC.h
View File

@ -241,7 +241,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst);
#define DMAU(ppc_state) (*(UReg_DMAU*)&(ppc_state).spr[SPR_DMAU])
#define DMAL(ppc_state) (*(UReg_DMAL*)&(ppc_state).spr[SPR_DMAL])
#define MMCR0(ppc_state) ((UReg_MMCR0&)(ppc_state).spr[SPR_MMCR0])
#define MMCR1 ((UReg_MMCR1&)PowerPC::ppcState.spr[SPR_MMCR1])
#define MMCR1(ppc_state) ((UReg_MMCR1&)(ppc_state).spr[SPR_MMCR1])
#define THRM1 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM1])
#define THRM2 ((UReg_THRM12&)PowerPC::ppcState.spr[SPR_THRM2])
#define THRM3 ((UReg_THRM3&)PowerPC::ppcState.spr[SPR_THRM3])