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Merge pull request #54 from lioncash/cleanup

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Cleanup mismatching struct/enum indentations.
This commit is contained in:
Ryan Houdek
2014-02-09 19:26:15 -06:00
parent 28b5c8be47 ebb48d019e
commit 8d25e12085
95 changed files with 2388 additions and 2381 deletions
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4
Source/Core/VideoBackends/Software/RasterFont.h
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@ -13,8 +13,8 @@ public:
static int debug;
// some useful constants
enum {char_width = 10};
enum {char_height = 15};
enum {char_width = 10};
enum {char_height = 15};
// and the happy helper functions
void printString(const char *s, double x, double y, double z=0.0);

82
Source/Core/VideoBackends/Software/SWCommandProcessor.h
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@ -17,30 +17,30 @@ namespace SWCommandProcessor
// internal hardware addresses
enum
{
STATUS_REGISTER = 0x00,
CTRL_REGISTER = 0x02,
CLEAR_REGISTER = 0x04,
FIFO_TOKEN_REGISTER = 0x0E,
FIFO_BOUNDING_BOX_LEFT = 0x10,
FIFO_BOUNDING_BOX_RIGHT = 0x12,
FIFO_BOUNDING_BOX_TOP = 0x14,
FIFO_BOUNDING_BOX_BOTTOM = 0x16,
FIFO_BASE_LO = 0x20,
FIFO_BASE_HI = 0x22,
FIFO_END_LO = 0x24,
FIFO_END_HI = 0x26,
FIFO_HI_WATERMARK_LO = 0x28,
FIFO_HI_WATERMARK_HI = 0x2a,
FIFO_LO_WATERMARK_LO = 0x2c,
FIFO_LO_WATERMARK_HI = 0x2e,
FIFO_RW_DISTANCE_LO = 0x30,
FIFO_RW_DISTANCE_HI = 0x32,
FIFO_WRITE_POINTER_LO = 0x34,
FIFO_WRITE_POINTER_HI = 0x36,
FIFO_READ_POINTER_LO = 0x38,
FIFO_READ_POINTER_HI = 0x3A,
FIFO_BP_LO = 0x3C,
FIFO_BP_HI = 0x3E
STATUS_REGISTER = 0x00,
CTRL_REGISTER = 0x02,
CLEAR_REGISTER = 0x04,
FIFO_TOKEN_REGISTER = 0x0E,
FIFO_BOUNDING_BOX_LEFT = 0x10,
FIFO_BOUNDING_BOX_RIGHT = 0x12,
FIFO_BOUNDING_BOX_TOP = 0x14,
FIFO_BOUNDING_BOX_BOTTOM = 0x16,
FIFO_BASE_LO = 0x20,
FIFO_BASE_HI = 0x22,
FIFO_END_LO = 0x24,
FIFO_END_HI = 0x26,
FIFO_HI_WATERMARK_LO = 0x28,
FIFO_HI_WATERMARK_HI = 0x2a,
FIFO_LO_WATERMARK_LO = 0x2c,
FIFO_LO_WATERMARK_HI = 0x2e,
FIFO_RW_DISTANCE_LO = 0x30,
FIFO_RW_DISTANCE_HI = 0x32,
FIFO_WRITE_POINTER_LO = 0x34,
FIFO_WRITE_POINTER_HI = 0x36,
FIFO_READ_POINTER_LO = 0x38,
FIFO_READ_POINTER_HI = 0x3A,
FIFO_BP_LO = 0x3C,
FIFO_BP_HI = 0x3E
};
// Fifo Status Register
@ -48,12 +48,12 @@ namespace SWCommandProcessor
{
struct
{
u16 OverflowHiWatermark : 1;
u16 UnderflowLoWatermark: 1;
u16 ReadIdle : 1; // done reading
u16 CommandIdle : 1; // done processing commands
u16 Breakpoint : 1;
u16 : 11;
u16 OverflowHiWatermark : 1;
u16 UnderflowLoWatermark : 1;
u16 ReadIdle : 1; // done reading
u16 CommandIdle : 1; // done processing commands
u16 Breakpoint : 1;
u16 : 11;
};
u16 Hex;
UCPStatusReg() {Hex = 0; }
@ -65,13 +65,13 @@ namespace SWCommandProcessor
{
struct
{
u16 GPReadEnable : 1;
u16 BPEnable : 1;
u16 FifoOverflowIntEnable : 1;
u16 FifoUnderflowIntEnable : 1;
u16 GPLinkEnable : 1;
u16 BreakPointIntEnable : 1;
u16 : 10;
u16 GPReadEnable : 1;
u16 BPEnable : 1;
u16 FifoOverflowIntEnable : 1;
u16 FifoUnderflowIntEnable : 1;
u16 GPLinkEnable : 1;
u16 BreakPointIntEnable : 1;
u16 : 10;
};
u16 Hex;
UCPCtrlReg() {Hex = 0; }
@ -83,10 +83,10 @@ namespace SWCommandProcessor
{
struct
{
u16 ClearFifoOverflow : 1;
u16 ClearFifoUnderflow : 1;
u16 ClearMetrices : 1;
u16 : 13;
u16 ClearFifoOverflow : 1;
u16 ClearFifoUnderflow : 1;
u16 ClearMetrices : 1;
u16 : 13;
};
u16 Hex;
UCPClearReg() {Hex = 0; }

4
Source/Core/VideoBackends/Software/SWPixelEngine.cpp
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@ -22,8 +22,8 @@ namespace SWPixelEngine
enum
{
INT_CAUSE_PE_TOKEN = 0x200, // GP Token
INT_CAUSE_PE_FINISH = 0x400, // GP Finished
INT_CAUSE_PE_TOKEN = 0x200, // GP Token
INT_CAUSE_PE_FINISH = 0x400, // GP Finished
};
// STATE_TO_SAVE

68
Source/Core/VideoBackends/Software/SWPixelEngine.h
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@ -15,17 +15,17 @@ namespace SWPixelEngine
// internal hardware addresses
enum
{
PE_ZCONF = 0x000, // Z Config
PE_ALPHACONF = 0x002, // Alpha Config
PE_ZCONF = 0x000, // Z Config
PE_ALPHACONF = 0x002, // Alpha Config
PE_DSTALPHACONF = 0x004, // Destination Alpha Config
PE_ALPHAMODE = 0x006, // Alpha Mode Config
PE_ALPHAREAD = 0x008, // Alpha Read
PE_ALPHAMODE = 0x006, // Alpha Mode Config
PE_ALPHAREAD = 0x008, // Alpha Read
PE_CTRL_REGISTER = 0x00a, // Control
PE_TOKEN_REG = 0x00e, // Token
PE_BBOX_LEFT = 0x010, // Flip Left
PE_BBOX_RIGHT = 0x012, // Flip Right
PE_BBOX_TOP = 0x014, // Flip Top
PE_BBOX_BOTTOM = 0x016, // Flip Bottom
PE_TOKEN_REG = 0x00e, // Token
PE_BBOX_LEFT = 0x010, // Flip Left
PE_BBOX_RIGHT = 0x012, // Flip Right
PE_BBOX_TOP = 0x014, // Flip Top
PE_BBOX_BOTTOM = 0x016, // Flip Bottom
// NOTE: Order not verified
// These indicate the number of quads that are being used as input/output for each particular stage
@ -48,10 +48,10 @@ namespace SWPixelEngine
u16 Hex;
struct
{
u16 ZCompEnable : 1; // Z Comparator Enable
u16 Function : 3;
u16 ZUpdEnable : 1;
u16 : 11;
u16 ZCompEnable : 1; // Z Comparator Enable
u16 Function : 3;
u16 ZUpdEnable : 1;
u16 : 11;
};
};
@ -60,15 +60,15 @@ namespace SWPixelEngine
u16 Hex;
struct
{
u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT
u16 BMLogic : 1; // GX_BM_LOGIC
u16 Dither : 1;
u16 ColorUpdEnable : 1;
u16 AlphaUpdEnable : 1;
u16 DstFactor : 3;
u16 SrcFactor : 3;
u16 Substract : 1; // Additive mode by default
u16 BlendOperator : 4;
u16 BMMath : 1; // GX_BM_BLEND || GX_BM_SUBSTRACT
u16 BMLogic : 1; // GX_BM_LOGIC
u16 Dither : 1;
u16 ColorUpdEnable : 1;
u16 AlphaUpdEnable : 1;
u16 DstFactor : 3;
u16 SrcFactor : 3;
u16 Substract : 1; // Additive mode by default
u16 BlendOperator : 4;
};
};
@ -77,9 +77,9 @@ namespace SWPixelEngine
u16 Hex;
struct
{
u16 DstAlpha : 8;
u16 Enable : 1;
u16 : 7;
u16 DstAlpha : 8;
u16 Enable : 1;
u16 : 7;
};
};
@ -88,8 +88,8 @@ namespace SWPixelEngine
u16 Hex;
struct
{
u16 Threshold : 8;
u16 CompareMode : 8;
u16 Threshold : 8;
u16 CompareMode : 8;
};
};
@ -98,8 +98,8 @@ namespace SWPixelEngine
u16 Hex;
struct
{
u16 ReadMode : 3;
u16 : 13;
u16 ReadMode : 3;
u16 : 13;
};
};
@ -107,11 +107,11 @@ namespace SWPixelEngine
{
struct
{
u16 PETokenEnable : 1;
u16 PEFinishEnable : 1;
u16 PEToken : 1; // write only
u16 PEFinish : 1; // write only
u16 : 12;
u16 PETokenEnable : 1;
u16 PEFinishEnable : 1;
u16 PEToken : 1; // write only
u16 PEFinish : 1; // write only
u16 : 12;
};
u16 Hex;
UPECtrlReg() {Hex = 0; }

6
Source/Core/VideoBackends/Software/SWmain.cpp
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@ -41,9 +41,9 @@ static volatile u32 s_swapRequested = false;
static volatile struct
{
u32 xfbAddr;
u32 fbWidth;
u32 fbHeight;
u32 xfbAddr;
u32 fbWidth;
u32 fbHeight;
} s_beginFieldArgs;
namespace SW