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addendum to r3265: update mask used in rfi in jitIL as well

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3273 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Shawn Hoffman
2009-05-22 07:15:42 +00:00
parent 32691cfad7
commit 8ee7cfa6c6
3 changed files with 5 additions and 7 deletions
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3
Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_Branch.cpp
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@ -114,6 +114,7 @@ void CompiledBlock(UGeckoInstruction _inst)
void rfi(UGeckoInstruction _inst) void rfi(UGeckoInstruction _inst)
{ {
// Restore saved bits from SRR1 to MSR. // Restore saved bits from SRR1 to MSR.
// Gecko/Broadway can save more bits than explicitly defined in ppc spec
const int mask = 0x87C0FFFF; const int mask = 0x87C0FFFF;
MSR = (MSR & ~mask) | (SRR1 & mask); MSR = (MSR & ~mask) | (SRR1 & mask);
//MSR[13] is set to 0. //MSR[13] is set to 0.
@ -123,7 +124,7 @@ void rfi(UGeckoInstruction _inst)
//PowerPC::CheckExceptions(); //PowerPC::CheckExceptions();
//else //else
// set NPC to saved offset and resume // set NPC to saved offset and resume
NPC = SRR0; // TODO: VERIFY...docs say ignore top two bits? NPC = SRR0;
m_EndBlock = true; m_EndBlock = true;
} }

3
Source/Core/Core/Src/PowerPC/Jit64/Jit_Branch.cpp
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@ -61,8 +61,7 @@ using namespace Gen;
gpr.Flush(FLUSH_ALL); gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL);
//Bits SRR1[0, 5-9, 16-23, 25-27, 30-31] are placed into the corresponding bits of the MSR. // See Interpreter rfi for details
//MSR[13] is set to 0.
const u32 mask = 0x87C0FFFF; const u32 mask = 0x87C0FFFF;
// MSR = (MSR & ~mask) | (SRR1 & mask); // MSR = (MSR & ~mask) | (SRR1 & mask);
MOV(32, R(EAX), M(&MSR)); MOV(32, R(EAX), M(&MSR));

6
Source/Core/Core/Src/PowerPC/Jit64IL/IR.cpp
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@ -2181,10 +2181,8 @@ static void DoWriteCode(IRBuilder* ibuild, Jit64* Jit, bool UseProfile) {
break; break;
} }
case RFIExit: { case RFIExit: {
// Bits SRR1[0, 5-9, 16-23, 25-27, 30-31] are placed // See Interpreter rfi for details
// into the corresponding bits of the MSR. const u32 mask = 0x87C0FFFF;
// MSR[13] is set to 0.
const u32 mask = 0x87C0FF73;
// MSR = (MSR & ~mask) | (SRR1 & mask); // MSR = (MSR & ~mask) | (SRR1 & mask);
Jit->MOV(32, R(EAX), M(&MSR)); Jit->MOV(32, R(EAX), M(&MSR));
Jit->MOV(32, R(ECX), M(&SRR1)); Jit->MOV(32, R(ECX), M(&SRR1));