Jit: Clarify FixGTBeforeSettingCRFieldBit comment

This commit is contained in:
JosJuice 2024-05-26 08:32:25 +02:00
parent 46dc406325
commit 921d711113
2 changed files with 8 additions and 6 deletions

View File

@ -152,9 +152,10 @@ void Jit64::SetCRFieldBit(int field, int bit)
void Jit64::FixGTBeforeSettingCRFieldBit(Gen::X64Reg reg) void Jit64::FixGTBeforeSettingCRFieldBit(Gen::X64Reg reg)
{ {
// Gross but necessary; if the input is totally zero and we set SO or LT, // GT is considered unset if the internal representation is <= 0, or in other words,
// or even just add the (1<<32), GT will suddenly end up set without us // if the internal representation either has bit 63 set or has all bits set to zero.
// intending to. This can break actual games, so fix it up. // If all bits are zero and we set some bit that's unrelated to GT, we need to set bit 63 so GT
// doesn't accidentally become considered set. Gross but necessary; this can break actual games.
TEST(64, R(reg), R(reg)); TEST(64, R(reg), R(reg));
FixupBranch dont_clear_gt = J_CC(CC_NZ); FixupBranch dont_clear_gt = J_CC(CC_NZ);
BTS(64, R(reg), Imm8(63)); BTS(64, R(reg), Imm8(63));

View File

@ -44,9 +44,10 @@ FixupBranch JitArm64::JumpIfCRFieldBit(int field, int bit, bool jump_if_set)
void JitArm64::FixGTBeforeSettingCRFieldBit(Arm64Gen::ARM64Reg reg) void JitArm64::FixGTBeforeSettingCRFieldBit(Arm64Gen::ARM64Reg reg)
{ {
// Gross but necessary; if the input is totally zero and we set SO or LT, // GT is considered unset if the internal representation is <= 0, or in other words,
// or even just add the (1<<32), GT will suddenly end up set without us // if the internal representation either has bit 63 set or has all bits set to zero.
// intending to. This can break actual games, so fix it up. // If all bits are zero and we set some bit that's unrelated to GT, we need to set bit 63 so GT
// doesn't accidentally become considered set. Gross but necessary; this can break actual games.
ARM64Reg WA = gpr.GetReg(); ARM64Reg WA = gpr.GetReg();
ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XA = EncodeRegTo64(WA);
ORR(XA, reg, LogicalImm(1ULL << 63, GPRSize::B64)); ORR(XA, reg, LogicalImm(1ULL << 63, GPRSize::B64));